Analytical modeling of surface accumulation behavior of fully depleted SOI four gate transistors (G4-FETs)

[1]  J. Brews.  A charge-sheet model of the MOSFET , 1978 .

[2]  Giorgio Baccarani,et al.  Analytical i.g.f.e.t. model including drift and diffusion currents , 1978 .

[3]  Hyung-Kyu Lim,et al.  Threshold voltage of thin-film Silicon-on-insulator (SOI) MOSFET's , 1983, IEEE Transactions on Electron Devices.

[4]  J.-P. Colinge,et al.  An SOI voltage-controlled bipolar-MOS device , 1987, IEEE Transactions on Electron Devices.

[5]  Y. Tsividis.  Operation and modeling of the MOS transistor , 1987 .

[6]  Adelmo Ortiz-Conde,et al.  The foundation of a charge-sheet model for the thin-film MOSFET , 1988 .

[7]  Hiroaki Hazama,et al.  Observation of mobility enhancement in ultrathin SOI MOSFETs , 1988 .

[8]  The nonequilibrium inversion layer charge of the thin-film SOI MOSFET , 1989 .

[9]  F. Klaassen,et al.  Compact transistor modelling for circuit design , 1990 .

[10]  K. N. Bhat,et al.  Numerical and charge sheet models for thin-film SOI MOSFETs , 1990 .

[11]  Jean-Pierre Colinge,et al.  Conduction mechanisms in thin-film accumulation-mode SOI p-channel MOSFETs , 1990 .

[12]  Hans-Oliver Joachim,et al.  Simulation and two-dimensional analytical modeling of subthreshold slope in ultrathin-film SOI MOSFETs down to 0.1 mu m gate length , 1993 .

[13]  E. Arnold.  Double-charge-sheet model for thin silicon-on-insulator films , 1996 .

[14]  Frederic Allibert,et al.  THE MULTIPLE-GATE MOS-JFET TRANSISTOR , 2002 .

[15]  Saturation current model for the N-channel Gsup4-FET , 2003 .

[16]  Subthreshold slope modulation in G 4 -FET transistor , 2004 .

[17]  S. Cristoloveanu,et al.  Investigation of the four-gate action in G/sup 4/-FETs , 2004, IEEE Transactions on Electron Devices.

[18]  Giorgio Fallica,et al.  Gamma-ray response of SOI bipolar junction transistors for fast, radiation tolerant front-end electronics , 2004 .

[19]  S. Cristoloveanu,et al.  A novel four-quadrant analog multiplier using SOI four-gate transistors (G/sup 4/-FETs) , 2005, Proceedings of the 31st European Solid-State Circuits Conference, 2005. ESSCIRC 2005..

[20]  K. Akarvardar,et al.  Analytical modeling of the two-dimensional potential distribution and threshold voltage of the SOI four-gate transistor , 2006, IEEE Transactions on Electron Devices.

[21]  D. Flandre,et al.  Thin Film Fully-Depleted SOI Four-Gate Transistors , 2007 .

[22]  peixiong zhao,et al.  Depletion-All-Around Operation of the SOI Four-Gate Transistor , 2007, IEEE Transactions on Electron Devices.

[23]  M. Z. R. Khan,et al.  A Subthreshold Swing Model for Thin-Film Fully Depleted SOI Four-Gate Transistors , 2012, IEEE Transactions on Electron Devices.