FPGA-implementation of wavelet-based denoising technique to remove power-line interference from ECG signal

This paper presents a real-time implementation on FPGA of a wavelet-based denoising technique applied to remove power-line interference from ECG signal. The soft-threshold is applied to the wavelet coefficients using the universal threshold estimated in the subband that includes the power-line frequency response. This real-time architecture presents two characteristics: 1) equalization of the filter path delays, and 2) estimation of the noise level from only a few samples. Experimental results show that the proposed architecture remove efficiently the power-line interference from ECG signal.

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