A high-speed real-time digital pulse compression system based on TMS320C6201
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The linear frequency-modulated pulse is one of the most important large time-bandwidth product signals, which demands large calculations for digital processing. In this paper, methods to improve the parallelism of FFT calculation in a VLIW architecture processor are studied, and a modified fixed-point FFT algorithm is promoted to meet the need of computation speed and accuracy. Then a high-speed real-time digital pulse compression system based on the TMS320C6201 is realized, it can implement DPC processing within 124 /spl mu/s, which is very close to the top performance of the TMS320C6201. The whole system has been applied in some radars and proved stable and reliable.
[1] Rainer Storn,et al. Some results in fixed point error analysis of the Bruun-FTT algorithm , 1993, IEEE Trans. Signal Process..
[2] A. Oppenheim,et al. Effects of finite register length in digital filtering and the fast Fourier transform , 1972 .
[3] Kai Hwang,et al. Advanced computer architecture - parallelism, scalability, programmability , 1992 .