A new symbolic technique for control-dependent scheduling
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[1] Alice C. Parker,et al. MAHA: A Program for Datapath Synthesis , 1986, DAC 1986.
[2] Yu-Chin Hsu,et al. A formal approach to the scheduling problem in high level synthesis , 1991, IEEE Trans. Comput. Aided Des. Integr. Circuits Syst..
[3] R. Composano,et al. Path-based scheduling for synthesis , 1990, Twenty-Third Annual Hawaii International Conference on System Sciences.
[4] Wayne H. Wolf,et al. Scheduling constraint generation for communicating processes , 1995, IEEE Trans. Very Large Scale Integr. Syst..
[5] Edward M. Riseman,et al. The Inhibition of Potential Parallelism by Conditional Jumps , 1972, IEEE Transactions on Computers.
[6] Yu-Chin Hsu,et al. Zone scheduling , 1993, IEEE Trans. Comput. Aided Des. Integr. Circuits Syst..
[7] Robert K. Brayton,et al. Multi-Valued Decision Diagrams , 1990 .
[8] Peter B. Denyer,et al. A new approach to pipeline optimisation , 1990, Proceedings of the European Design Automation Conference, 1990., EDAC..
[9] Forrest Brewer,et al. On applicability of symbolic techniques to larger scheduling problems , 1995, Proceedings the European Design and Test Conference. ED&TC 1995.
[10] Scott A. Mahlke,et al. A comparison of full and partial predicated execution support for ILP processors , 1995, Proceedings 22nd Annual International Symposium on Computer Architecture.
[11] Michael Payer,et al. Allocation algorithms based on path analysis , 1992, Integr..
[12] Jochen A. G. Jess,et al. Exact scheduling strategies based on bipartite graph matching , 1995, Proceedings the European Design and Test Conference. ED&TC 1995.
[13] B. R. Rau,et al. The Cydra 5 Departmental Supercomputer: design philosophies, decisions and trade-offs , 1989, [1989] Proceedings of the Twenty-Second Annual Hawaii International Conference on System Sciences. Volume 1: Architecture Track.
[14] Kenneth J. Supowit,et al. Finding the Optimal Variable Ordering for Binary Decision Diagrams , 1990, IEEE Trans. Computers.
[15] A. H. Timmer,et al. Execution interval analysis under resource constraints , 1993, Proceedings of 1993 International Conference on Computer Aided Design (ICCAD).
[16] Wayne H. Wolf,et al. An Automaton Model for Scheduling Constraints in Synchronous Machines , 1995, IEEE Trans. Computers.
[17] Kazutoshi Wakabayashi,et al. A resource sharing and control synthesis method for conditional branches , 1989, 1989 IEEE International Conference on Computer-Aided Design. Digest of Technical Papers.
[18] C.N. Coelho. Dynamic Scheduling And Synchronization Synthesis Of Concurrent Digital Systems Under System-level Constraints , 1994, IEEE/ACM International Conference on Computer-Aided Design.
[19] Wayne H. Wolf,et al. The Princeton University behavioral synthesis system , 1992, [1992] Proceedings 29th ACM/IEEE Design Automation Conference.
[20] Daniel D. Gajski,et al. An effective methodology for functional pipelining , 1992, 1992 IEEE/ACM International Conference on Computer-Aided Design.
[21] Mohamed I. Elmasry,et al. Global optimization approach for architectural synthesis , 1990, IEEE Trans. Comput. Aided Des. Integr. Circuits Syst..
[22] Kunio Fukunaga,et al. A scheduling method by stepwise expansion in high-level synthesis , 1992, ICCAD.
[23] Chen-Shang Lin,et al. On the OBDD-Representation of General Boolean Functions , 1992, IEEE Trans. Computers.
[24] Kazutoshi Wakabayashi,et al. Global scheduling independent of control dependencies based on condition vectors , 1992, [1992] Proceedings 29th ACM/IEEE Design Automation Conference.
[25] Alexandru Nicolau,et al. Percolation based synthesis , 1991, DAC '90.
[26] Forrest Brewer,et al. Analysis of conditional resource sharing using a guard-based control representation , 1995, Proceedings of ICCD '95 International Conference on Computer Design. VLSI in Computers and Processors.
[27] John B. Shoven,et al. I , Edinburgh Medical and Surgical Journal.
[28] Pierre G. Paulin,et al. Force-directed scheduling for the behavioral synthesis of ASICs , 1989, IEEE Trans. Comput. Aided Des. Integr. Circuits Syst..
[29] Giovanni De Micheli,et al. Synthesis and Optimization of Digital Circuits , 1994 .
[30] Giovanni De Micheli,et al. Scheduling and control generation with environmental constraints based on automata representations , 1996, IEEE Trans. Comput. Aided Des. Integr. Circuits Syst..
[31] Randal E. Bryant,et al. Efficient implementation of a BDD package , 1991, DAC '90.
[32] Taewhan Kim,et al. A scheduling algorithm for conditional resource sharing , 1991, 1991 IEEE International Conference on Computer-Aided Design Digest of Technical Papers.
[33] C L Liu,et al. Symbolic Techniques for Optimal Scheduling 1 , .
[34] Alice C. Parker,et al. The high-level synthesis of digital systems , 1990, Proc. IEEE.
[35] Ken Kennedy,et al. Conversion of control dependence to data dependence , 1983, POPL '83.
[36] Giovanni De Micheli,et al. Relative scheduling under timing constraints , 1991, DAC '90.
[37] Catherine H. Gebotys. Throughput optimized architectural synthesis , 1993, IEEE Trans. Very Large Scale Integr. Syst..
[38] Forrest Brewer,et al. Ensemble representation and techniques for exact control-dependent scheduling , 1994, Proceedings of 7th International Symposium on High-Level Synthesis.
[39] Randal E. Bryant,et al. Graph-Based Algorithms for Boolean Function Manipulation , 1986, IEEE Transactions on Computers.
[40] Wayne H. Wolf,et al. Optimal scheduling of finite-state machines , 1993, Proceedings of 1993 IEEE International Conference on Computer Design ICCD'93.
[41] Giovanni De Micheli,et al. Dynamic scheduling and synchronization synthesis of concurrent digital systems under system-level constraints , 1994, ICCAD '94.
[42] Joe D. Warren,et al. The program dependence graph and its use in optimization , 1987, TOPL.
[43] H. Komi,et al. A scheduling method by stepwise expansion in high-level synthesis , 1992, 1992 IEEE/ACM International Conference on Computer-Aided Design.
[44] Miodrag Potkonjak,et al. Optimizing resource utilization using transformations , 1991, 1991 IEEE International Conference on Computer-Aided Design Digest of Technical Papers.
[45] Shin-ichi Minato,et al. Zero-Suppressed BDDs for Set Manipulation in Combinatorial Problems , 1993, 30th ACM/IEEE Design Automation Conference.
[46] J. F. Wang,et al. A Tree-Based Scheduling Algorithm for Control-Dominated Circuits , 1993, 30th ACM/IEEE Design Automation Conference.
[47] Minjoong Rim,et al. Global scheduling with code-motions for high-level synthesis applications , 1995, IEEE Trans. Very Large Scale Integr. Syst..