Noise Isolation Modeling and Experimental Validation of Power Distribution Network in Chip-Package

This paper models the chip and the package power distribution network in the simplified SPICE-level. The model is successfully validated by experiments using Vector Network Analyzer. By using the SPICE-level model, the noise isolation between the noise current source at the chip and the power distribution network at the package is analyzed from 1 MHz to 3 GHz. The contribution of each part in the power distribution network is also analyzed by experiments. The transfer impedances are simulated and measured the power distribution network between the chip and the package varying with the wire- bond and the on-package decoupling capacitor, case by case.

[1]  Seongsoo Lee,et al.  Analysis of chip-to-chip power noise coupling on several SDRAM modules , 2004, Proceedings. 8th IEEE Workshop on Signal Propagation on Interconnects.

[2]  Madhavan Swaminathan,et al.  Modeling and Analysis of Power Distribution Networks for Gigabit Applications , 2003, IEEE Trans. Mob. Comput..

[3]  R.R. Tummala,et al.  The SOP for miniaturized, mixed-signal computing, communication, and consumer systems of the next decade , 2004, IEEE Transactions on Advanced Packaging.

[4]  Larry D. Smith,et al.  Power distribution system design methodology and capacitor selection for modern CMOS technology , 1999 .

[5]  裕幸 飯田,et al.  International Technology Roadmap for Semiconductors 2003の要求清浄度について － シリコンウエハ表面と雰囲気環境に要求される清浄度, 分析方法の現状について － , 2004 .

[6]  Hyungsoo Kim,et al.  Modeling and simulation of IC and package power/ground network , 2006, 2006 IEEE International Symposium on Electromagnetic Compatibility, 2006. EMC 2006..

[7]  Joungho Kim,et al.  Prediction and verification of power/ground plane edge radiation excited by through-hole signal via based on balanced TLM and via coupling model , 2003, Electrical Performance of Electrical Packaging (IEEE Cat. No. 03TH8710).

[8]  Eby G. Friedman,et al.  Noise coupling in multi-voltage power distribution systems with decoupling capacitors , 2005, 2005 IEEE International Symposium on Circuits and Systems.

[9]  Hyungsoo Kim,et al.  Suppression of GHz range power/ground inductive impedance and simultaneous switching noise using embedded film capacitors in multilayer packages and PCBs , 2004 .