论文信息 - A stored charge model for estimating I/sup 2/L gate delay

A stored charge model for estimating I/sup 2/L gate delay

Calculated results with this model compare favorably to those obtained experimentally. This model not only provides physical insight into I/SUP 2/L device operation, but serves as a useful tool for device and process design optimization.

J.S.T. Huang | T.E. Hendrickson | J.S.T. Huang | T. E. Hendrickson

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