An Optimized Nature-Inspired Metaheuristic Algorithm for Application Mapping in 2D-NoC
暂无分享,去创建一个
[1] Bevan M. Baas,et al. NoCTweak: a Highly Parameterizable Simulator for Early Exploration of Performance and Energy of Networks On-Chip , 2012 .
[2] Takuya Yoshihiro,et al. A Distance-Vector-Based Multi-Path Routing Scheme for Static-Node-Assisted Vehicular Networks , 2019, Sensors.
[3] Yousaf Bin Zikria,et al. Fault-Tolerant Network-On-Chip Router Architecture Design for Heterogeneous Computing Systems in the Context of Internet of Things , 2020, Sensors.
[4] Aravindhan Alagarsamy,et al. SAT: A new application mapping method for power optimization in 2D — NoC , 2016, 2016 20th International Symposium on VLSI Design and Test (VDAT).
[5] R. Farah,et al. A method for efficient mapping and reliable routing for NoC architectures with minimum bandwidth and area , 2008, 2008 Joint 6th International IEEE Northeast Workshop on Circuits and Systems and TAISA Conference.
[6] Masoud Daneshtalab,et al. Defender: A Low Overhead and Efficient Fault-Tolerant Mechanism for Reliable on-Chip Router , 2019, IEEE Access.
[7] Nicola Concer,et al. Simulation and analysis of network on chip architectures: ring, spidergon and 2D mesh , 2006, Proceedings of the Design Automation & Test in Europe Conference.
[8] Ozcan Ozturk,et al. An ILP formulation for application mapping onto Network-on-Chips , 2009, 2009 International Conference on Application of Information and Communication Technologies.
[9] Shashi Kumar,et al. A two-step genetic algorithm for mapping task graphs to a network on chip architecture , 2003, Euromicro Symposium on Digital System Design, 2003. Proceedings..
[10] Partha Pratim Pande,et al. Networks-on-Chip in a Three-Dimensional Environment: A Performance Evaluation , 2009, IEEE Transactions on Computers.
[11] Andrew B. Kahng,et al. Improved on-chip router analytical power and area modeling , 2010, 2010 15th Asia and South Pacific Design Automation Conference (ASP-DAC).
[12] Ciprian Radu,et al. Domain-Knowledge Optimized Simulated Annealing for Network-on-Chip Application Mapping , 2013 .
[13] Lakshminarayanan Gopalakrishnan,et al. A Self-Adaptive Mapping Approach for Network on Chip With Low Power Consumption , 2019, IEEE Access.
[14] Guy Gogniat,et al. A multi-objective approach for multi-application NoC mapping , 2011, 2011 IEEE Second Latin American Symposium on Circuits and Systems (LASCAS).
[15] Luca Benini,et al. Analysis of power consumption on switch fabrics in network routers , 2002, DAC '02.
[16] Pier Luca Lanzi,et al. Ant Colony Heuristic for Mapping and Scheduling Tasks and Communications on Heterogeneous Embedded Systems , 2010, IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems.
[17] Santanu Chattopadhyay,et al. A survey on application mapping strategies for Network-on-Chip design , 2013, J. Syst. Archit..
[18] Shubha Bhat. ENERGY MODELS FOR NETWORK-ON-CHIP COMPONENTS , 2005 .
[19] Yousaf Bin Zikria,et al. NoCGuard: A Reliable Network-on-Chip Router Architecture , 2020, Electronics.
[20] Pawel Romanczuk,et al. Proto-cooperation: group hunting sailfish improve hunting success by alternating attacks on grouping prey , 2016, Proceedings of the Royal Society B: Biological Sciences.
[21] L. Carro,et al. Time and energy efficient mapping of embedded applications onto NoCs , 2005, Proceedings of the ASP-DAC 2005. Asia and South Pacific Design Automation Conference, 2005..
[22] Yousaf Bin Zikria,et al. An energy efficient and low overhead fault mitigation technique for internet of thing edge devices reliable on‐chip communication , 2020, Softw. Pract. Exp..
[23] Suleyman Tosun. New heuristic algorithms for energy aware application mapping and routing on mesh-based NoCs , 2011, J. Syst. Archit..
[24] Moon Kyum Kim,et al. Optimization of Position and Number of Hotspot Detectors Using Artificial Neural Network and Genetic Algorithm to Estimate Material Levels Inside a Silo , 2021, Sensors.
[25] L Wu,et al. Energy-Efficient Adaptive Sensing Scheduling in Wireless Sensor Networks Using Fibonacci Tree Optimization Algorithm , 2021, Sensors.
[26] Bin Xie,et al. An energy-aware online task mapping algorithm in NoC-based system , 2011, The Journal of Supercomputing.
[27] Dilbag Singh,et al. Data Clustering Using Moth-Flame Optimization Algorithm , 2021, Sensors.
[28] Axel Jantsch,et al. Cluster-based Simulated Annealing for Mapping Cores onto 2D Mesh Networks on Chip , 2008, 2008 11th IEEE Workshop on Design and Diagnostics of Electronic Circuits and Systems.
[29] Santanu Chattopadhyay,et al. Application Mapping Onto Mesh-Based Network-on-Chip Using Discrete Particle Swarm Optimization , 2014, IEEE Transactions on Very Large Scale Integration (VLSI) Systems.
[30] A. L. Imoize,et al. An Overview of Machine Learning within Embedded and Mobile Devices–Optimizations and Applications , 2021, Sensors.
[31] Taher Niknam,et al. An efficient hybrid approach based on PSO, ACO and k-means for cluster analysis , 2010, Appl. Soft Comput..
[32] Radu Marculescu,et al. Energy-aware mapping for tile-based NoC architectures under performance constraints , 2003, ASP-DAC '03.
[33] Srinivasan Murali,et al. Bandwidth-constrained mapping of cores onto NoC architectures , 2004, Proceedings Design, Automation and Test in Europe Conference and Exhibition.
[34] Ahmad Khademzadeh,et al. Chain-Mapping for mesh based Network-on-Chip architecture , 2009, IEICE Electron. Express.
[35] Tobias Bjerregaard,et al. A survey of research and practices of Network-on-chip , 2006, CSUR.
[36] Leandro Soares Indrusiak,et al. Exploring NoC-Based MPSoC Design Space with Power Estimation Models , 2011, IEEE Design & Test of Computers.
[37] Sao-Jie Chen,et al. Networks on Chips: Structure and Design Methodologies , 2012, J. Electr. Comput. Eng..
[38] Radu Marculescu,et al. Energy- and performance-aware mapping for regular NoC architectures , 2005, IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems.
[39] G. K. Sharma,et al. Application Mapping of Mesh Based-NoC Using Multi-Objective Genetic Algorithm , 2008 .
[40] Luigi Dilillo,et al. Maximizing the Inner Resilience of a Network-on-Chip through Router Controllers Design † , 2019, Sensors.
[41] Cheng Wang,et al. Bat Algorithm Based Low Power Mapping Methods for 3D Network-on-Chips , 2017, NCTCS.
[42] Vincenzo Catania,et al. Multi-objective mapping for mesh-based NoC architectures , 2004, International Conference on Hardware/Software Codesign and System Synthesis, 2004. CODES + ISSS 2004..
[43] Nadia Nedjah,et al. Routing for applications in NoC using ACO-based algorithms , 2013, Appl. Soft Comput..
[44] S. Shadravan,et al. The Sailfish Optimizer: A novel nature-inspired metaheuristic algorithm for solving constrained engineering optimization problems , 2019, Eng. Appl. Artif. Intell..
[45] Ahmad Patooghy,et al. RMAP: A Reliability-Aware Application Mapping for Network-on-Chips , 2010, 2010 Third International Conference on Dependability.