High performance 8-bit mux based multiplier design using MOS Current Mode Logic

This paper presents a high performance 8×8 bit mux-based multiplier using MOS Current Mode Logic (MCML). A small library of MCML logic gates consisting of NAND/AND, 2 to 1 MUX and full adder are designed and optimized for low power and high-speed operation. Also a 4:1 MUX is designed which is one of the most essential component of this multiplier. Using these gates, a mux-based 8 bit MCML multiplier is designed and tested for 2 different supply currents, in a UMC 0.18 μm CMOS technology and VDD of 1.8V. According to our simulations, the highest current circuit works at 1 GHz and consumes 16 mW, while the lowest power operates at 550 MHz and consumes 10 mW. The circuits are either consumes less power or operates up to a higher frequency compared to equivalent circuits in the literature. One of the most important advantages of this circuit is the absence of the power supply current spikes which makes the circuit very suitable for mixed mode designs.

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