Delay analysis of micropipelines
暂无分享,去创建一个
[1] Shih-Lien Lu. Design of hardware efficient selftimed circuits , 1993 .
[2] Kenneth Steiglitz,et al. Bubbles can make self-timed pipelines fast , 1990, J. VLSI Signal Process..
[3] J. Mavor,et al. Data flow approach to self-timed logic in VLSI , 1988, 1988., IEEE International Symposium on Circuits and Systems.
[4] Steven M. Burns,et al. The design of an asynchronous microprocessor , 1989, CARN.
[5] Ted E. Williams. Performance of iterative computation in self-timed rings , 1994, J. VLSI Signal Process..
[6] Shih-Lien Lu,et al. Micro data flow processors , 1993, Proceedings of IEEE Pacific Rim Conference on Communications Computers and Signal Processing.