Compressive Sensing Reconstruction for Complex System: A Hardware/Software Approach

Today, a number of applications need to process large bandwidth signals. These applications frequently require the use of fast ADCs and very efficient DSP structures that are difficult to design. An interesting solution for facing these issues is the Compressive Sensing (CS) method, which, assuming to know some properties of the signal, allows to reduce the sampling rate well below the Nyquist rate. A negative aspect of CS is the need to introduce an additional element for the reconstruction the sampled signal. This reconstruction requires techniques that generally have an high computational cost, representing a critical element for a real-time implementation of CS systems. In this work we present the implementation of one of these reconstruction algorithms, named Orthogonal Matching Pursuit (OMP). This algorithm involves heavy computational cost (in particular for the matrix computation), which limits its use in the case of a strictly real-time applications, as in the case of radar systems. To overcome this limitation authors propose a solution that uses for the implementation a mixed software/hardware approach. The proposed architecture was implemented on the Xilinx ZYNQ FPGA. The experimental results show a significant speed-up of the algorithm.

[1]  Gian Carlo Cardarilli,et al.  Compressive sensing spectrum analysis for space autonomous radio receivers , 2013, 2013 Asilomar Conference on Signals, Systems and Computers.

[2]  M. Re,et al.  Implementation of the AES algorithm using a Reconfigurable Functional Unit , 2011, ISSCS 2011 - International Symposium on Signals, Circuits and Systems.

[3]  G.C. Cardarilli,et al.  Butterfly and Inverse Butterfly nets integration on Altera NIOS-II embedded processor , 2010, 2010 Conference Record of the Forty Fourth Asilomar Conference on Signals, Systems and Computers.

[4]  Tinoosh Mohsenin,et al.  High performance compressive sensing reconstruction hardware with QRD process , 2012, 2012 IEEE International Symposium on Circuits and Systems.

[5]  Ruby B. Lee,et al.  Integration of butterfly and inverse butterfly nets in embedded processors: Effects on power saving , 2012, 2012 Conference Record of the Forty Sixth Asilomar Conference on Signals, Systems and Computers (ASILOMAR).

[6]  Thomas S. Huang,et al.  A fast orthogonal matching pursuit algorithm , 1998, Proceedings of the 1998 IEEE International Conference on Acoustics, Speech and Signal Processing, ICASSP '98 (Cat. No.98CH36181).

[7]  Joel A. Tropp,et al.  Greed is good: algorithmic results for sparse approximation , 2004, IEEE Transactions on Information Theory.

[8]  Gian Carlo Cardarilli,et al.  TDES cryptography algorithm acceleration using a reconfigurable functional unit , 2014, 2014 21st IEEE International Conference on Electronics, Circuits and Systems (ICECS).

[9]  Salvatore Pontarelli,et al.  A Reconfigurable Functional Unit for Modular Operations , 2013, ApplePies.

[10]  Avi Septimus,et al.  Compressive sampling hardware reconstruction , 2010, Proceedings of 2010 IEEE International Symposium on Circuits and Systems.

[11]  Gian Carlo Cardarilli,et al.  Partial reconfiguration in the implementation of autonomous radio receivers for space , 2011, 6th International Workshop on Reconfigurable Communication-Centric Systems-on-Chip (ReCoSoC).

[12]  Joel A. Tropp,et al.  Signal Recovery From Random Measurements Via Orthogonal Matching Pursuit , 2007, IEEE Transactions on Information Theory.

[13]  Gian Carlo Cardarilli,et al.  Algorithm acceleration on LEON-2 processor using a reconfigurable bit manipulation unit , 2010, 2010 8th Workshop on Intelligent Solutions in Embedded Systems.