Low-density parity-check (LDPC) codes are capacity-approaching forward error correction codes that operate at signal-to-noise ratio (SNR) decoding thresholds very near to the capacity limits. Receivers designed for less optimal codes might not function smoothly at the lower values of SNR where LDPC codes can operate. In particular, an artifact of low-SNR receiver operation is the increased probability of symbol slips. Receiver synchronization errors resulting from symbol insertions or deletions can cause unexpected decoder problems, especially for an LDPC code with a quasi-cyclic construction.
In this paper we analyze the theoretical basis for symbol slips to cause undetected errors with quasi-cyclic codes, and we demonstrate these effects via simulations. We also examine several no-cost to low-cost solutions that can mitigate these effects.
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