, Memory device, module and method for accessing a memory cell memory cell

A memory cell (100) comprises a first data node (101) and a second data node (105) for storing complementary data. The memory cell (100) further comprises a errste word line (104) is provided with a first access unit (103) and coupled to a second access unit (107), and a second word line (110) with a third access unit (109) and is coupled to a fourth access unit (112). A first complementary bit line pair (102, 106) is connected to the first and second data nodes (101, 105) coupled and a second complementary bit line pair (108, 111) is connected to the first and second data nodes (101, 105) coupled. The first word line (104) and the second word line (110) are designed such that they activate with each write access to the memory cell (100) a read access to the memory cell (100).