Automatic feasibility/performance estimation of mixed-signal circuits based on design specifications

This paper proposes a new technique to estimate the feasibility/performance surfaces of mixed-signal circuits. The estimates will be used to construct a multi-class classifier which can be used as an automatic topology selector for the top-down design of analog circuits. The technique employs an ANN classification algorithm that requires no a priori knowledge of the complexity or shape of estimated surfaces. The estimation is optimized with respect to the training data size using a query-based data growing technique. As a case study, the feasibility/performance surfaces of sub-circuits in a 2nd order /spl Sigma/-/spl Delta/ ADC are estimated. The estimation results confirm the generality of the proposed method. Estimated surfaces can be updated swiftly as the process technology evolves, which makes our technique nearly process technology independent.

[1]  Ramesh Harjani,et al.  Macromodeling of analog circuits for hierarchical circuit design , 1994, ICCAD '94.

[2]  Julie Chen,et al.  STYLE: a statistical design approach based on nonparametric performance macromodeling , 1995, IEEE Trans. Comput. Aided Des. Integr. Circuits Syst..

[3]  Fathey M. El-Turky,et al.  BLADES: an artificial intelligence approach to analog circuit design , 1989, IEEE Trans. Comput. Aided Des. Integr. Circuits Syst..

[4]  Rob A. Rutenbar,et al.  OASYS: a framework for analog circuit synthesis , 1989, IEEE Trans. Comput. Aided Des. Integr. Circuits Syst..

[5]  M. J. D. Powell,et al.  Radial basis functions for multivariable interpolation: a review , 1987 .

[6]  Yoh-Han Pao,et al.  Adaptive pattern recognition and neural networks , 1989 .

[7]  Ramesh Harjani,et al.  Feasibility region modeling of analog circuits for hierarchical circuit design , 1994, Proceedings of 1994 37th Midwest Symposium on Circuits and Systems.

[8]  E. Charbon,et al.  A Top-down, Constraint-driven Design Methodology For Analog Integrated Circuits , 1996, 1992 Proceedings of the IEEE Custom Integrated Circuits Conference.

[9]  Jenq-Neng Hwang,et al.  Query-based learning applied to partially trained multilayer perceptrons , 1991, IEEE Trans. Neural Networks.

[10]  Willy Sansen,et al.  HECTOR: a hierarchical topology-construction program for analog circuits based on a declarative approach to circuit modeling , 1991, Proceedings of the IEEE 1991 Custom Integrated Circuits Conference.

[11]  Eric A. Vittoz,et al.  IDAC: an interactive design tool for analog CMOS circuits , 1987 .