Historical trend in alpha-particle induced soft error rates of the Alpha/sup TM/ microprocessor

In this work, we present /spl alpha/-particle induced soft error rates (SER) for several generations of the Alpha microprocessor. In our analysis, we focus in particular on the historical trend of soft error rates for memory cells and random core logic. Our data demonstrate the impact of process, design and packaging material on the SER. The total chip-level SER trend has not been monotonic over the last couple of process generations, whereas the susceptibility to /spl alpha/-particle induced soft errors has actually decreased for both the core logic and memory cells. For all investigated technologies, the core SER is dominated by asynchronous as opposed to synchronous soft errors.