Design and implementation of sigma-delta DPWM controller for switching converter

This paper describes the complete design and implementation of a low-power sigma-delta DPWM (Σ-Δ DPWM) controller for switching converter which can operate at a very high frequency. In the previous design approach, the effective resolution of Σ-Δ DPWM, i.e. the effective number of bit (ENOB) is over-estimated by using the conventional signal-to-noise ratio (SNR) with a continuous-time sine-wave input. Therefore, the modified expressions of SNR and ENOB are presented, which are suitable for the digital sigma-delta modulator (Σ-Δ MOD) with a discrete-time discrete-amplitude signal. In addition, the trade off between the hardware area consumption and the SNR value is discussed. Finally, the system simulation results of the general 10-b DPWM controller and 10-b effective resolution ΣΔ DPWM controller for buck converter are shown to verify the proposed design approach