A floating tap termination scheme with inverted DBI AC and floating tap forcing technique for high-speed low-power signaling

This paper presents a novel floating tap termination (FTT) scheme with inverted data bus inversion (iDBI_AC) and floating tap forcing (FTF) to remove the DC current path, leading to reduction of static current. The iDBI_AC and FTF are proposed to resolve common-mode stabilization issues for the floating tap termination scheme during transmitting unbalanced data patterns. Power efficiency with the proposed scheme using 0.6V I/O supply and a 0.13-um technology is measured as 0.127mW/Gbps/pin, which is 61% lower than that of a low tap termination (LTT) scheme used in LPDDR4X. In addition to the power benefit, measurement results present that the proposed scheme leads to achieve 7Gbps data-rate without penalty of signal integrity issues and the iDBI_AC minimizes inter-symbol interference (ISI).