Dichotomy Slot Allocation: A Low-Jitter Scheduling Scheme for Input-Queued Switches

Recently, jitter is becoming an important performance criterion in switch scheduling to accommodate many emerging real-time applications. Formerly proposed low-jitter scheduling algorithms decompose traffic demands into a weighted sum of permutation matrices and then schedule these decomposed permutation matrices. However, a port pair's appearance in these decomposed matrices may exceed their actual traffic demand. Such extra allocation may result in high jitter for a port pair. In order to smoothly schedule each port pair, we propose a novel scheduling algorithm termed as dichotomy slot allocation (DSA). To achieve low jitter and small cell loss, DSA allocates slots to port pairs based on a designed Dichotomy Order. Both analysis and simulation results demonstrate that DSA achieves relatively lower jitter as compared to the state of the art.

[1]  George Varghese,et al.  Efficient fair queueing using deficit round-robin , 1996, TNET.

[2]  QueueingJon,et al.  WF 2 Q : Worst-case Fair Weighted Fair , 1996 .

[3]  Laxmi N. Bhuyan,et al.  Guaranteed smooth switch scheduling with low complexity , 2005, GLOBECOM '05. IEEE Global Telecommunications Conference, 2005..

[4]  Murali S. Kodialam,et al.  On guaranteed smooth scheduling for input-queued switches , 2003, IEEE INFOCOM 2003. Twenty-second Annual Joint Conference of the IEEE Computer and Communications Societies (IEEE Cat. No.03CH37428).

[5]  Hui Zhang,et al.  WF/sup 2/Q: worst-case fair weighted fair queueing , 1996, Proceedings of IEEE INFOCOM '96. Conference on Computer Communications.

[6]  Samuel P. Morgan,et al.  Input Versus Output Queueing on a Space-Division Packet Switch , 1987, IEEE Trans. Commun..

[7]  Jean-Yves Le Boudec,et al.  Delay jitter bounds and packet scale rate guarantee for expedited forwarding , 2001, Proceedings IEEE INFOCOM 2001. Conference on Computer Communications. Twentieth Annual Joint Conference of the IEEE Computer and Communications Society (Cat. No.01CH37213).

[8]  Scott Shenker,et al.  Analysis and simulation of a fair queueing algorithm , 1989, SIGCOMM '89.

[9]  Nirwan Ansari,et al.  Input-queued switching with QoS guarantees , 1999, IEEE INFOCOM '99. Conference on Computer Communications. Proceedings. Eighteenth Annual Joint Conference of the IEEE Computer and Communications Societies. The Future is Now (Cat. No.99CH36320).

[10]  Kai-Yeung Siu,et al.  On achieving throughput in an input-queued switch , 2003, TNET.

[11]  Tony Tong Lee,et al.  Huffman Fair Queueing: A Scheduling Algorithm Providing Smooth Output Traffic , 2006, 2006 IEEE International Conference on Communications.

[12]  Xiao Zhang,et al.  Achieving fairness and throughput for best-effort traffic in input-queued crossbar switches , 2005, GLOBECOM '05. IEEE Global Telecommunications Conference, 2005..

[13]  Cheuk H. Lam,et al.  Path Switching - A Quasi-Static Routing Scheme for Large-Scale ATM Packet Switches , 1997, IEEE J. Sel. Areas Commun..

[14]  Cheng-Shang Chang,et al.  Birkhoff-von Neumann input buffered crossbar switches , 2000, Proceedings IEEE INFOCOM 2000. Conference on Computer Communications. Nineteenth Annual Joint Conference of the IEEE Computer and Communications Societies (Cat. No.00CH37064).

[15]  Dong Wei,et al.  Guaranteeing service rates for cell-based schedulers with a grouping architecture , 2003 .

[16]  Chuanxiong Guo,et al.  SRR: an O(1) time-complexity packet scheduler for flows in multiservice packet networks , 2004, IEEE/ACM Transactions on Networking.

[17]  Boaz Patt-Shamir,et al.  Jitter control in QoS networks , 1998, Proceedings 39th Annual Symposium on Foundations of Computer Science (Cat. No.98CB36280).