Micropower linear compatible I2L techniques in biomedical telemetry

This report will cover an implantable PCM preprocessor using stratified epitaxy, nonabutting N+ collars, and PNP-eoupled stacked I2L to reduce transmitter power drain by a decade without added IC fabrication steps.

[1]  H. Berger,et al.  An investigation of the intrinsic delay (speed limit) in MTL/I/sup 2/L , 1979, IEEE Journal of Solid-State Circuits.

[2]  T. Okabe,et al.  Stacked I/sup 2/L circuit , 1977, IEEE Journal of Solid-State Circuits.

[3]  F. Klaassen Device physics of integrated injection logic , 1975, IEEE Transactions on Electron Devices.

[4]  A. Slob,et al.  Integrated injection logic: a new approach to LSI , 1972 .

[5]  R.W. Dutton,et al.  I/sup 2/L DC functional requirements , 1977, IEEE Journal of Solid-State Circuits.

[6]  J.S.T. Huang,et al.  A stored charge model for estimating I/sup 2/L gate delay , 1977, IEEE Journal of Solid-State Circuits.