A Multi-MicroBlaze Based SOC System: From SystemC Modeling to FPGA Prototyping
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The complexity of multi-processor system-on-chip (MPSOC) design has made design, simulation and verification/validation a significant challenge for SOC designers. To produce a complex MPSOC system in a short design cycle, system simulation and validation must be done in an affordable time. Solutions to this challenge include moving simulation to a higher abstraction level such as in SystemC, and validating the system through FPGA prototyping. This paper presents a MPSOC system which consists of 4 Xilinx microblaze processors interconnected with FSL (fast simplex link) channels. This system has two equivalent "views": one is a high-level SystemC framework for modeling and simulation, and the other is a hardware framework for FPGA implementation and prototyping. This system is supplied to the member universities of the Canadian System-on-Chip Research Network (SOCRN), managed by CMC Microsystems, as an MPSOC design, simulation and validation environment.
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