89-GHz f/sub T/ room-temperature silicon MOSFETs

The authors report the implementation of deep-submicrometer Si MOSFETs that at room temperature have a unity-current-gain cutoff frequency (f/sub T/) of 89 GHz, for a drain-to-source bias of 1.5 V, a gate-to-source bias of 1 V, a gate oxide thickness of 40 AA, and a channel length of 0.15 mu m. The fabrication procedure is mostly conventional, except for the e-beam defined gates. The speed performance is achieved through an intrinsic transit time of only 1.8 ps across the active device region.<<ETX>>

[1]  R.H. Dennard,et al.  Design and experimental technology for 0.1-µm gate-length low-temperature operation FET's , 1987, IEEE Electron Device Letters.

[2]  W. Fichtner,et al.  0.15 µm Channel-length MOSFETs fabricated using e-beam lithography , 1982, 1982 International Electron Devices Meeting.

[3]  D. Antoniadis,et al.  Physics and technology of ultra short channel MOSFET devices , 1991, International Electron Devices Meeting 1991 [Technical Digest].

[4]  L.E. Larson,et al.  A deep-submicrometer microwave/digital CMOS/SOS technology , 1991, IEEE Electron Device Letters.

[5]  D. Harame,et al.  75-GHz f/sub T/ SiGe-base heterojunction bipolar transistors , 1990, IEEE Electron Device Letters.

[6]  Tokuo Kure,et al.  A 64 GHz Si bipolar transistor using in-situ phosphorus doped polysilicon emitter technology , 1991, International Electron Devices Meeting 1991 [Technical Digest].

[7]  R.H. Dennard,et al.  Inverter performance of deep-submicrometer MOSFETs , 1988, IEEE Electron Device Letters.

[8]  R. F. Motta,et al.  A new method to determine MOSFET channel length , 1980, IEEE Electron Device Letters.

[9]  Shinji Okazaki,et al.  0.1 mu m CMOS devices using low-impurity-channel transistors (LICT) , 1990, International Technical Digest on Electron Devices.

[10]  S. Sze High-speed semiconductor devices , 1990 .

[11]  0.15 µm Channel-length MOSFET's fabricated using e-beam lithography , 1982, IEEE Electron Device Letters.

[12]  G. Guegan,et al.  High-frequency performance of submicrometer channel-length silicon MOSFETs , 1991, IEEE Electron Device Letters.

[13]  Thomas J. Watson,et al.  High Transconductance and Velocity Overshoot in NMOS Devices at the 0. l-pm Gate-Length Level , 1988 .

[14]  Digh Hisamoto,et al.  A 0.1 mu m-gate elevated source and drain MOSFET fabricated by phase-shifted lithography , 1991, International Electron Devices Meeting 1991 [Technical Digest].

[15]  D. Kern,et al.  High transconductance and velocity overshoot in NMOS devices at the 0.1- mu m gate-length level , 1988, IEEE Electron Device Letters.