Nanoscale resistive switching devices for memory and computing applications

With the slowing down of the Moore’s law and fundamental limitations due to the von-Neumann bottleneck, continued improvements in computing hardware performance become increasingly more challenging. Resistive switching (RS) devices are being extensively studied as promising candidates for next generation memory and computing applications due to their fast switching speed, excellent endurance and retention, and scaling and three-dimensional (3D) stacking capability. In particular, RS devices offer the potential to natively emulate the functions and structures of synapses and neurons, allowing them to efficiently implement neural networks (NNs) and other in-memory computing systems for data intensive applications such as machine learning tasks. In this review, we will examine the mechanisms of RS effects and discuss recent progresses in the application of RS devices for memory, deep learning accelerator, and more faithful brain-inspired computing tasks. Challenges and possible solutions at the device, algorithm, and system levels will also be discussed.

[1]  Weiwei Xia,et al.  Memristor Crossbars with 4.5 Terabits-per-Inch-Square Density and Two Nanometer Dimension , 2018, ArXiv.

[2]  Benjamin Schrauwen,et al.  Reservoir-based techniques for speech recognition , 2006, The 2006 IEEE International Joint Conference on Neural Network Proceedings.

[3]  H.-S. Philip Wong,et al.  In-memory computing with resistive switching devices , 2018, Nature Electronics.

[4]  Huaqiang Wu,et al.  Atomistic study of dynamics for metallic filament growth in conductive-bridge random access memory. , 2015, Physical chemistry chemical physics : PCCP.

[5]  D. B. Strukov,et al.  Programmable CMOS/Memristor Threshold Logic , 2013, IEEE Transactions on Nanotechnology.

[6]  S. Jo,et al.  Cross-Point Resistive RAM Based on Field-Assisted Superlinear Threshold Selector , 2015, IEEE Transactions on Electron Devices.

[7]  Sungho Kim,et al.  Experimental demonstration of a second-order memristor and its ability to biorealistically implement synaptic plasticity. , 2015, Nano letters.

[8]  M. Pickett,et al.  A scalable neuristor built with Mott memristors. , 2013, Nature materials.

[9]  Pritish Narayanan,et al.  Equivalent-accuracy accelerated neural-network training using analogue memory , 2018, Nature.

[10]  R. Waser,et al.  Nanoionics-based resistive switching memories. , 2007, Nature materials.

[11]  Gregory S. Snider,et al.  ‘Memristive’ switches enable ‘stateful’ logic operations via material implication , 2010, Nature.

[12]  Seung Hwan Lee,et al.  Temporal data classification and forecasting using a memristor-based reservoir computing system , 2019, Nature Electronics.

[13]  Chung-Wei Hsu,et al.  3D vertical TaOx/TiO2 RRAM with over 103 self-rectifying ratio and sub-μA operating current , 2013, 2013 IEEE International Electron Devices Meeting.

[14]  Harald Haas,et al.  Harnessing Nonlinearity: Predicting Chaotic Systems and Saving Energy in Wireless Communication , 2004, Science.

[15]  M. R. Uddin,et al.  A plasma-treated chalcogenide switch device for stackable scalable 3D nanoscale memory , 2013, Nature Communications.

[16]  W. Lu,et al.  High-density Crossbar Arrays Based on a Si Memristive System , 2008 .

[17]  D. Strukov,et al.  CMOL FPGA: a reconfigurable architecture for hybrid digital circuits with two-terminal nanodevices , 2005 .

[18]  Wei D. Lu,et al.  On‐Demand Reconfiguration of Nanomaterials: When Electronics Meets Ionics , 2018, Advanced materials.

[19]  Warren Robinett,et al.  Memristor-CMOS hybrid integrated circuits for reconfigurable logic. , 2009, Nano letters.

[20]  Yukio Hayakawa,et al.  An 8 Mb Multi-Layered Cross-Point ReRAM Macro With 443 MB/s Write Throughput , 2012, IEEE Journal of Solid-State Circuits.

[21]  Kinam Kim,et al.  In situ observation of filamentary conducting channels in an asymmetric Ta2O5−x/TaO2−x bilayer structure , 2013, Nature Communications.

[22]  S. Balatti,et al.  Resistive Switching by Voltage-Driven Ion Migration in Bipolar RRAM—Part II: Modeling , 2012, IEEE Transactions on Electron Devices.

[23]  Shinhyun Choi,et al.  SiGe epitaxial memory for neuromorphic computing with reproducible high performance based on engineered dislocations , 2018, Nature Materials.

[24]  Voltage-controlled reverse filament growth boosts resistive switching memory , 2018, Nano Research.

[25]  Yusuf Leblebici,et al.  Neuromorphic computing with multi-memristive synapses , 2017, Nature Communications.

[26]  Jiaming Zhang,et al.  Analogue signal and image processing with large memristor crossbars , 2017, Nature Electronics.

[27]  Bing Chen,et al.  Efficient in-memory computing architecture based on crossbar arrays , 2015, 2015 IEEE International Electron Devices Meeting (IEDM).

[28]  Alex Pappachen James,et al.  Resistive Threshold Logic , 2013, IEEE Transactions on Very Large Scale Integration (VLSI) Systems.

[29]  Duane Mills,et al.  19.7 A 16Gb ReRAM with 200MB/s write and 1GB/s read in 27nm technology , 2014, 2014 IEEE International Solid-State Circuits Conference Digest of Technical Papers (ISSCC).

[30]  Masahide Matsumoto,et al.  A 130.7mm2 2-layer 32Gb ReRAM memory device in 24nm technology , 2013, 2013 IEEE International Solid-State Circuits Conference Digest of Technical Papers.

[31]  Y. Liu,et al.  Synaptic Learning and Memory Functions Achieved Using Oxygen Ion Migration/Diffusion in an Amorphous InGaZnO Memristor , 2012 .

[32]  Qing Wu,et al.  Efficient and self-adaptive in-situ learning in multilayer memristor neural networks , 2018, Nature Communications.

[33]  Ligang Gao,et al.  Programming Protocol Optimization for Analog Weight Tuning in Resistive Memories , 2015, IEEE Electron Device Letters.

[34]  Mohammed A. Zidan,et al.  Field-Programmable Crossbar Array (FPCA) for Reconfigurable Computing , 2016, IEEE Transactions on Multi-Scale Computing Systems.

[35]  David A. Patterson,et al.  In-datacenter performance analysis of a tensor processing unit , 2017, 2017 ACM/IEEE 44th Annual International Symposium on Computer Architecture (ISCA).

[36]  Jason Cong,et al.  Scaling for edge inference of deep neural networks , 2018 .

[37]  N. Righos,et al.  A stackable cross point Phase Change Memory , 2009, 2009 IEEE International Electron Devices Meeting (IEDM).

[38]  O. Richard,et al.  10×10nm2 Hf/HfOx crossbar resistive RAM with excellent performance, reliability and low-energy operation , 2011, 2011 International Electron Devices Meeting.

[39]  L.O. Chua,et al.  Memristive devices and systems , 1976, Proceedings of the IEEE.

[40]  J Joshua Yang,et al.  Memristive devices for computing. , 2013, Nature nanotechnology.

[41]  D. Stewart,et al.  The missing memristor found , 2008, Nature.

[42]  P. Narayanan,et al.  Access devices for 3D crosspoint memorya) , 2014 .

[43]  D. Ielmini,et al.  Study of Multilevel Programming in Programmable Metallization Cell (PMC) Memory , 2009, IEEE Transactions on Electron Devices.

[44]  Narayan Srinivasa,et al.  A functional hybrid memristor crossbar-array/CMOS system for data storage and neuromorphic applications. , 2012, Nano letters.

[45]  H. Hwang,et al.  Electrical and reliability characteristics of a scaled (∼30nm) tunnel barrier selector (W/Ta2O5/TaOx/TiO2/TiN) with excellent performance (JMAX > 107A/cm2) , 2014, Symposium on VLSI Technology.

[46]  Wei Lu,et al.  The future of electronics based on memristive systems , 2018, Nature Electronics.

[47]  Alessandro Calderoni,et al.  Learning of spatiotemporal patterns in a spiking neural network with resistive switching synapses , 2018, Science Advances.

[48]  Kinam Kim,et al.  A fast, high-endurance and scalable non-volatile memory device made from asymmetric Ta2O(5-x)/TaO(2-x) bilayer structures. , 2011, Nature materials.

[49]  Tuo-Hung Hou,et al.  Bipolar Nonlinear $\hbox{Ni/TiO}_{2}\hbox{/}\hbox{Ni}$ Selector for 1S1R Crossbar Array Applications , 2011, IEEE Electron Device Letters.

[50]  Huiyu Zhou,et al.  Using deep neural network with small dataset to predict material defects , 2019, Materials & Design.

[51]  H. C. Jung,et al.  NbO2-based low power and cost effective 1S1R switching for high density cross point ReRAM Application , 2014, Symposium on VLSI Technology.

[52]  M. Rozenberg,et al.  A Leaky‐Integrate‐and‐Fire Neuron Analog Realized with a Mott Insulator , 2017 .

[53]  Bing Chen,et al.  A general memristor-based partial differential equation solver , 2018, Nature Electronics.

[54]  Wei D. Lu,et al.  Electrochemical dynamics of nanoscale metallic inclusions in dielectrics , 2014, Nature Communications.

[55]  Yuchao Yang,et al.  Observation of conducting filament growth in nanoscale resistive memories , 2012, Nature Communications.

[56]  J. Yang,et al.  Memristive switching mechanism for metal/oxide/metal nanodevices. , 2008, Nature nanotechnology.

[57]  E. D’Angelo The human brain project. , 2012, Functional neurology.

[58]  J. Yang,et al.  High switching endurance in TaOx memristive devices , 2010 .

[59]  D. Ielmini,et al.  Complementary switching in metal oxides: Toward diode-less crossbar RRAMs , 2011, 2011 International Electron Devices Meeting.

[60]  D. Ielmini,et al.  Universal Reset Characteristics of Unipolar and Bipolar Metal-Oxide RRAM , 2011, IEEE Transactions on Electron Devices.

[61]  Xuedong Bai,et al.  Filament growth dynamics in solid electrolyte-based resistive memories revealed by in situ TEM , 2014, Nano Research.

[62]  G.E. Moore,et al.  Cramming More Components Onto Integrated Circuits , 1998, Proceedings of the IEEE.

[63]  S. Ovshinsky Reversible Electrical Switching Phenomena in Disordered Structures , 1968 .

[64]  P. Mc Crory,et al.  Collaborative development , 2011, BDJ.

[65]  Sally A. McKee,et al.  Hitting the memory wall: implications of the obvious , 1995, CARN.

[66]  Herb Sutter,et al.  The Free Lunch Is Over A Fundamental Turn Toward Concurrency in Software , 2013 .

[67]  Shinhyun Choi,et al.  Comprehensive physical model of dynamic resistive switching in an oxide memristor. , 2014, ACS nano.

[68]  L. Appeltant,et al.  Information processing using a single dynamical node as complex system , 2011, Nature communications.

[69]  Farnood Merrikh-Bayat,et al.  Training and operation of an integrated neuromorphic network based on metal-oxide memristors , 2014, Nature.

[70]  Zhengya Zhang,et al.  A fully integrated reprogrammable memristor–CMOS system for efficient multiply–accumulate operations , 2019, Nature Electronics.

[71]  J. Yang,et al.  Memristor crossbar arrays with 6-nm half-pitch and 2-nm critical dimension , 2018, Nature Nanotechnology.

[72]  Wei Yang Lu,et al.  Nanoscale memristor device as synapse in neuromorphic systems. , 2010, Nano letters.

[73]  Joel Emer,et al.  Eyeriss: an Energy-efficient Reconfigurable Accelerator for Deep Convolutional Neural Networks Accessed Terms of Use , 2022 .

[74]  Qi Liu,et al.  Controllable growth of nanoscale conductive filaments in solid-electrolyte-based ReRAM by using a metal nanocrystal covered bottom electrode. , 2010, ACS nano.

[75]  H. Hwang,et al.  Excellent Selector Characteristics of Nanoscale $ \hbox{VO}_{2}$ for High-Density Bipolar ReRAM Applications , 2011, IEEE Electron Device Letters.

[76]  Herbert Jaeger,et al.  Optimization and applications of echo state networks with leaky- integrator neurons , 2007, Neural Networks.

[77]  David A. Hounshell,et al.  Science and research policy at the end of Moore’s law , 2018, Nature Electronics.

[78]  Seung Hwan Lee,et al.  Reservoir computing using dynamic memristors for temporal information processing , 2017, Nature Communications.

[79]  Yue Bai,et al.  Study of Multi-level Characteristics for 3D Vertical Resistive Switching Memory , 2014, Scientific reports.

[80]  U. Böttger,et al.  Beyond von Neumann—logic operations in passive crossbar arrays alongside memory operations , 2012, Nanotechnology.

[81]  Wei D. Lu,et al.  Nanoscale electrochemistry using dielectric thin films as solid electrolytes. , 2016, Nanoscale.

[82]  Bo Chen,et al.  Quantization and Training of Neural Networks for Efficient Integer-Arithmetic-Only Inference , 2017, 2018 IEEE/CVF Conference on Computer Vision and Pattern Recognition.

[83]  Damien Querlioz,et al.  Neuromorphic computing with nanoscale spintronic oscillators , 2017, Nature.

[84]  Giacomo Indiveri,et al.  Memory and Information Processing in Neuromorphic Systems , 2015, Proceedings of the IEEE.

[85]  M. Tsai,et al.  Ultra high density 3D via RRAM in pure 28nm CMOS process , 2013, 2013 IEEE International Electron Devices Meeting.

[86]  J. Yang,et al.  Memristors with diffusive dynamics as synaptic emulators for neuromorphic computing. , 2017, Nature materials.

[87]  R. Williams,et al.  Nano/CMOS architectures using a field-programmable nanowire interconnect , 2007 .

[88]  G. W. Burr,et al.  Experimental demonstration and tolerancing of a large-scale neural network (165,000 synapses), using phase-change memory as the synaptic weight element , 2015, 2014 IEEE International Electron Devices Meeting.

[89]  Heiner Giefers,et al.  Mixed-precision in-memory computing , 2017, Nature Electronics.

[90]  L. Chua Memristor-The missing circuit element , 1971 .

[91]  Shoji Sakamoto,et al.  An 8Mb multi-layered cross-point ReRAM macro with 443MB/s write throughput , 2012, 2012 IEEE International Solid-State Circuits Conference.

[92]  S. Menzel,et al.  Simulation of multilevel switching in electrochemical metallization memory cells , 2012 .

[93]  Mark Horowitz,et al.  1.1 Computing's energy problem (and what we can do about it) , 2014, 2014 IEEE International Solid-State Circuits Conference Digest of Technical Papers (ISSCC).

[94]  Wei D. Lu,et al.  Charge Transition of Oxygen Vacancies during Resistive Switching in Oxide-Based RRAM. , 2019, ACS applied materials & interfaces.

[95]  Byung Joon Choi,et al.  High‐Speed and Low‐Energy Nitride Memristors , 2016 .

[96]  Hafner,et al.  Ab initio molecular-dynamics simulation of the liquid-metal-amorphous-semiconductor transition in germanium. , 1994, Physical review. B, Condensed matter.

[97]  H. Hwang,et al.  TiO2-based metal-insulator-metal selection device for bipolar resistive random access memory cross-point application , 2011 .

[98]  Hyunsang Hwang,et al.  Varistor-type bidirectional switch (JMAX>107A/cm2, selectivity∼104) for 3D bipolar resistive memory arrays , 2012, 2012 Symposium on VLSI Technology (VLSIT).

[99]  Kate J. Norris,et al.  Trilayer Tunnel Selectors for Memristor Memory Cells , 2015, Advanced materials.

[100]  Brian D. Hoskins,et al.  Optimized stateful material implication logic for three-dimensional data manipulation , 2016, Nano Research.

[101]  D. Jeong,et al.  Memristors for Energy‐Efficient New Computing Paradigms , 2016 .

[102]  Ojas Parekh,et al.  Energy Scaling Advantages of Resistive Memory Crossbar Based Computation and Its Application to Sparse Coding , 2016, Front. Neurosci..

[103]  Xiaoyu Sun,et al.  Impact of Non-Ideal Characteristics of Resistive Synaptic Devices on Implementing Convolutional Neural Networks , 2019, IEEE Journal on Emerging and Selected Topics in Circuits and Systems.

[104]  Herbert Jaeger,et al.  Reservoir computing approaches to recurrent neural network training , 2009, Comput. Sci. Rev..

[105]  Gordon E. Moore,et al.  Progress in digital integrated electronics , 1975 .

[106]  Jong-Ho Lee,et al.  32 × 32 Crossbar Array Resistive Memory Composed of a Stacked Schottky Diode and Unipolar Resistive Memory , 2013 .

[107]  M. Kozicki,et al.  Electrochemical metallization memories—fundamentals, applications, prospects , 2011, Nanotechnology.

[108]  Mohammed A. Zidan,et al.  Temporal Learning Using Second-Order Memristors , 2017, IEEE Transactions on Nanotechnology.

[109]  Yuan Taur,et al.  Device scaling limits of Si MOSFETs and their application dependencies , 2001, Proc. IEEE.

[110]  Alessandro Calderoni,et al.  A copper ReRAM cell for Storage Class Memory applications , 2014, 2014 Symposium on VLSI Technology (VLSI-Technology): Digest of Technical Papers.

[111]  R. Dittmann,et al.  Redox‐Based Resistive Switching Memories – Nanoionic Mechanisms, Prospects, and Challenges , 2009, Advanced materials.

[112]  S. Ambrogio,et al.  Normally-off Logic Based on Resistive Switches—Part I: Logic Gates , 2015, IEEE Transactions on Electron Devices.

[113]  Siddharth Gaba,et al.  Ultralow Sub-1-nA Operating Current Resistive Memory With Intrinsic Non-Linear Characteristics , 2014, IEEE Electron Device Letters.

[114]  Rainer Waser,et al.  Understanding filamentary growth in electrochemical metallization memory cells using kinetic Monte Carlo simulations. , 2015, Nanoscale.

[115]  Y. S. Kim,et al.  Integration of 4F2 selector-less crossbar array 2Mb ReRAM based on transition metal oxides for high density memory applications , 2012, 2012 Symposium on VLSI Technology (VLSIT).

[116]  S. Jo,et al.  3D-stackable crossbar resistive memory based on Field Assisted Superlinear Threshold (FAST) selector , 2014, 2014 IEEE International Electron Devices Meeting.

[117]  Kai Sun,et al.  Tuning Ionic Transport in Memristive Devices by Graphene with Engineered Nanopores. , 2016, ACS nano.

[118]  Ion Necoara,et al.  Nonasymptotic convergence of stochastic proximal point methods for constrained convex optimization , 2017, J. Mach. Learn. Res..

[119]  Xiaojian Zhu,et al.  Nanoionic Resistive‐Switching Devices , 2019, Advanced Electronic Materials.

[120]  K. Aratani,et al.  Process integration of a 27nm, 16Gb Cu ReRAM , 2014, 2014 IEEE International Electron Devices Meeting.

[121]  H. Markram,et al.  Regulation of Synaptic Efficacy by Coincidence of Postsynaptic APs and EPSPs , 1997, Science.

[122]  Catherine E. Graves,et al.  Memristor‐Based Analog Computation and Neural Network Classification with a Dot Product Engine , 2018, Advanced materials.

[123]  Wei D. Lu,et al.  Sparse coding with memristor networks. , 2017, Nature nanotechnology.

[124]  S. Clima,et al.  High-Performance Metal-Insulator-Metal Tunnel Diode Selectors , 2014, IEEE Electron Device Letters.

[125]  Demis Hassabis,et al.  Mastering the game of Go with deep neural networks and tree search , 2016, Nature.

[126]  Ran El-Yaniv,et al.  Quantized Neural Networks: Training Neural Networks with Low Precision Weights and Activations , 2016, J. Mach. Learn. Res..

[127]  Kailash Gopalakrishnan,et al.  Overview of candidate device technologies for storage-class memory , 2008, IBM J. Res. Dev..

[128]  Miao Hu,et al.  ISAAC: A Convolutional Neural Network Accelerator with In-Situ Analog Arithmetic in Crossbars , 2016, 2016 ACM/IEEE 43rd Annual International Symposium on Computer Architecture (ISCA).

[129]  J. Yang,et al.  Memristive crossbar arrays for brain-inspired computing , 2019, Nature Materials.

[130]  H. Ahn,et al.  Realization of vertical resistive memory (VRRAM) using cost effective 3D process , 2011, 2011 International Electron Devices Meeting.

[131]  D Ielmini,et al.  Multiple Memory States in Resistive Switching Devices Through Controlled Size and Orientation of the Conductive Filament , 2013, Advanced materials.

[132]  JaegerHerbert,et al.  2007 Special Issue , 2007 .

[133]  H.-S. Philip Wong,et al.  Face classification using electronic synapses , 2017, Nature Communications.

[134]  Gökmen Tayfun,et al.  Acceleration of Deep Neural Network Training with Resistive Cross-Point Devices: Design Considerations , 2016, Front. Neurosci..

[135]  Chang Jung Kim,et al.  Physical electro-thermal model of resistive switching in bi-layered resistance-change memory , 2013, Scientific Reports.

[136]  Chung H. Lam,et al.  Storage Class Memory , 2010, 2010 10th IEEE International Conference on Solid-State and Integrated Circuit Technology.

[137]  H. Wong,et al.  CMOS scaling into the nanometer regime , 1997, Proc. IEEE.

[138]  Xiaochen Peng,et al.  NeuroSim+: An integrated device-to-algorithm framework for benchmarking synaptic devices and array architectures , 2017, 2017 IEEE International Electron Devices Meeting (IEDM).

[139]  Lifeng Liu,et al.  Reconfigurable Nonvolatile Logic Operations in Resistance Switching Crossbar Array for Large‐Scale Circuits , 2016, Advanced materials.

[140]  T. Hasegawa,et al.  Short-term plasticity and long-term potentiation mimicked in single inorganic synapses. , 2011, Nature materials.