METrICS: a Measurement Environment For Multi-Core Time Critical Systems

With the upcoming shift from single-core to multicore COTS processors for safety critical products such as avionics, railway or space computer subsystems, the safety critical industry is facing a trade-off in terms of performance versus predictability. In multi-core processors, concurrent accesses to shared hardware resources are generating inter-task or inter-application timing interference, breaking the timing isolation principles required by the standards for such critical software. Several solutions have been proposed in the literature to control or regulate these timing interference, but most of these solutions require to perform some level of profiling, monitoring or dimensioning. As time-critical software is running on top of Real Time Operating Systems (ROTS), classical profiling techniques relying on interrupts, multi-threading, or OS modules are either not available or prohibited for predictability, safety or security reasons. In this paper we present METrICS, a measurement environment for multi-core time-critical systems running on top of the industry-standard PikeOS RTOS. Our framework proposes an accurate real-time runtime and resource usage measurement while having a negligible impact on timing behaviour, allowing us to fully observe and characterize timing interference. Beyond being able to characterize timing interference, we evaluated METrICS in term of accuracy of the timing and resource usage measurements, intrusiveness both in term of timing and impact on the legacy code. We also present a portfolio of the kind of measurements METrICS provides.

[1]  Xavier Jean Maîtrise de la couche hyperviseur sur les architectures multi-coeurs COTS dans un contexte avionique. (Hypervisor control of COTS multi-cores processors in order to enforce determinism for future avionics equipment) , 2015 .

[2]  Sylvain Girbal,et al.  A complete toolchain for an interference-free deployment of avionic applications on multi-core systems , 2015, 2015 IEEE/AIAA 34th Digital Avionics Systems Conference (DASC).

[3]  Sylvain Girbal,et al.  Deterministic platform software for hard real-time systems using multi-core COTS , 2015, 2015 IEEE/AIAA 34th Digital Avionics Systems Conference (DASC).

[4]  Thomas G. Baker Lessons Learned Integrating COTS into Systems , 2002, ICCBSS.

[5]  Greg Bartlett QorIQ P4080 Communications Processor design in 45nm SOI , 2009 .

[6]  Wes McKinney,et al.  pandas: a Foundational Python Library for Data Analysis and Statistics , 2011 .

[7]  John W. Tukey,et al.  Exploratory Data Analysis. , 1979 .

[8]  Nicholas Nethercote,et al.  Valgrind: a framework for heavyweight dynamic binary instrumentation , 2007, PLDI '07.

[9]  Gaël Varoquaux,et al.  The NumPy Array: A Structure for Efficient Numerical Computation , 2011, Computing in Science & Engineering.

[10]  Daniel Gracia Pérez,et al.  Predictable Flight Management System Implementation on a Multicore Processor , 2014 .

[11]  M. Gatti,et al.  Ensuring robust partitioning in multicore platforms for IMA systems , 2012, 2012 IEEE/AIAA 31st Digital Avionics Systems Conference (DASC).

[12]  Raimund Kirner,et al.  Obstacles in Worst-Case Execution Time Analysis , 2008, 2008 11th IEEE International Symposium on Object and Component-Oriented Real-Time Distributed Computing (ISORC).

[13]  Jeffrey Heer,et al.  D³ Data-Driven Documents , 2011, IEEE Transactions on Visualization and Computer Graphics.

[14]  Christine Rochange,et al.  Distributed run-time WCET controller for concurrent critical tasks in mixed-critical systems , 2014, RTNS.

[15]  John L. Gustafson,et al.  Reevaluating Amdahl's law , 1988, CACM.

[16]  Fabrice Bellard,et al.  QEMU, a Fast and Portable Dynamic Translator , 2005, USENIX ATC, FREENIX Track.

[17]  Tullio Vardanega,et al.  ON THE INDUSTRIAL FITNESS OF WCET ANALYSIS , 2011 .

[18]  Brinkley Sprunt,et al.  The Basics of Performance-Monitoring Hardware , 2002, IEEE Micro.

[19]  Lui Sha,et al.  Single Core Equivalent Virtual Machines for Hard Real—Time Computing on Multicore Processors , 2014 .

[20]  Lui Sha,et al.  MemGuard: Memory bandwidth reservation system for efficient performance isolation in multi-core platforms , 2013, 2013 IEEE 19th Real-Time and Embedded Technology and Applications Symposium (RTAS).

[21]  G. Amdhal,et al.  Validity of the single processor approach to achieving large scale computing capabilities , 1967, AFIPS '67 (Spring).

[22]  Amitabh Srivastava,et al.  Analysis Tools , 2019, Public Transportation Systems.

[23]  John D. Hunter,et al.  Matplotlib: A 2D Graphics Environment , 2007, Computing in Science & Engineering.