A photocell-array with on-chip normalisation and mismatch compensation

In this paper, a photosensitive array consisting of a novel cell is proposed. The main features of the array are: i) logarithmic conversion of photocurrent to voltage, ii) normalization of each pixel's photocurrent towards the average photocurrent, iii) correction of pixels mismatches compensating for fabrication mismatch and iv) flexible interfacing with other circuitry. A 16/spl times/16 prototype array of the proposed cells, along with the corresponding 8-bit decoder have been designed and fabricated through the AMS 0.6/spl mu/ standard CMOS process, and the validity of the above features has been verified through experimental results. The array can be used as a core unit of an image recognition system.