Skew-Tolerant Domino Techniques for High-Speed Baugh-Wooley Multiplier Circuit Design

The conventional architecture suffers significant timing overhead due to system clock skew and logic path unbalance, which in turn decreases the performance of a circuit. This paper presents a design of high-speed Baugh-Wooley multiplier based on skew-tolerant domino. From simulation results, it is demonstrated that the performance is improved.

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