Defect Diagnosis Using a Current Ratio Based Quiescent Signal Analysis Model for Commercial Power Grids

Quiescent Signal Analysis (QSA) is a novel electrical-test-based diagnostic technique that uses IDDQ measurements made at multiple chip supply pads as a means of locating shorting defects in the layout. The use of multiple supply pads reduces the adverse effects of leakage current by scaling the total leakage current over multiple measurements. In previous work, a resistance model for QSA was developed and demonstrated on a small circuit. In this paper, the weaknesses of the original QSA model are identified, in the context of a production power grid (PPG) and probe card model, and a new model is described. The new QSA algorithm is developed from the analysis of IDDQ contour plots. A “family” of hyperbola curves is shown to be a good fit to the contour curves. The parameters to the hyperbola equations are derived with the help of inserted calibration transistors. Simulation experiments are used to demonstrate the prediction accuracy of the method on a PPG.

[1]  M. Ray Mercer,et al.  Iddq test: sensitivity analysis of scaling , 1996, Proceedings International Test Conference 1996. Test and Design Validity.

[2]  James F. Plusquellic,et al.  A process and technology-tolerant I/sub DDQ/ method for IC diagnosis , 2001, Proceedings 19th IEEE VLSI Test Symposium. VTS 2001.

[3]  Claude Thibeault On the Comparison of IDDQ and IDDQ Testing , 1999, VTS.

[4]  James F. Plusquellic IC Diagnosis Using Multiple Supply Pad IDDQs , 2001, IEEE Des. Test Comput..

[5]  Dhruva Acharyya,et al.  Diagnosis using Quiescent Signal Analysis on a Commercial Power Grid , 2002 .

[6]  Sani R. Nassif,et al.  Fast power grid simulation , 2000, Proceedings 37th Design Automation Conference.

[7]  Robert C. Aitken,et al.  Current ratios: a self-scaling technique for production IDDQ testing , 2000, Proceedings International Test Conference 2000 (IEEE Cat. No.00CH37159).

[8]  Chintan Patel,et al.  A Current Ratio Model for Defect Diagnosis using Quiescent Signal Analysis , 2002 .

[9]  Claude Thibeault,et al.  Diagnosis method based on /spl Delta/Iddq probabilistic signatures: experimental results , 1998, Proceedings International Test Conference 1998 (IEEE Cat. No.98CH36270).

[10]  Jerry M. Soden,et al.  Signature analysis for IC diagnosis and failure analysis , 1997, Proceedings International Test Conference 1997.

[11]  Wojciech Maly,et al.  Current signatures [VLSI circuit testing] , 1996, Proceedings of 14th VLSI Test Symposium.