Data sensing circuit for highly integrated semiconductor memory device

The data stored in the memory cell of a highly integrated semiconductor memory device which is operated by the operating voltage of the low voltage relates to a circuit for controlling so as to effectively sense the. The data sensing circuit has a bit line connected to the separation of the pair of bit lines and the sense amplifier the data is passed in the memory cell connected to the bit line sensing ssangreul gate. The bit line isolation gate is turned off after the word line is enabled by the data of the memory cell the bit line pair and the sense bit line pairs sharing the charge took place. The sensing bit line pair of the first, is connected to a second sensing bit lines are respectively is for the step-up capacitors, respectively, these are the first and second voltage sensing bit line to voltage step-up operation when the bit line isolation gate off The booster. The first and second sense amplifier connected between the sensing bit line after the voltage step-up operation of the completion and sensing a voltage difference between the sensed bit line pair amplifier, in which the bit line isolation gates are bit and the sensing bit line pairs It supplies the voltage sense amplifier connected to the line pair as Li Stoic voltage of the memory cell.