3D TCAD Analysis of Hot-Carrier Degradation Mechanisms in 10 nm Node Input/Output Bulk FinFETs

In this paper, we investigated the hotcarrier injection (HCI) mechanism, one of the most important reliability issues, in 10 nm node Input/Output (I/O) bulk FinFET. The FinFET has much intensive HCI damage in Fin-bottom region, while the HCI damage for planar device has relatively uniform behavior. The local damage behavior in the FinFET is due to the geometrical characteristics. Also, the HCI is significantly affected by doping profile, which could change the worst HCI bias condition. This work suggested comprehensive understanding of HCI mechanisms and the guideline of doping profile in 10 nm node I/O bulk FinFET.

[1]  P. Kannan.  Fundamental blocks of single ended LVCMOS output buffer- a circuit level design guideline , 2007, 2007 18th European Conference on Circuit Theory and Design.

[3]  S. Asai,et al.  Submicrometer MOSFET structure for minimizing hot-carrier generation , 1982, IEEE Transactions on Electron Devices.

[4]  Ying Jin,et al.  Electric passivation of interface traps at drain junction space charge region in p-MOS transistors , 2001, Microelectron. Reliab..

[5]  Lateral distribution of hot-carrier-induced oxide charge and interface traps in MOSFET's , 1991, 1991 International Symposium on VLSI Technology, Systems, and Applications - Proceedings of Technical Papers.

[6]  Jin-Woo Han,et al.  Body Thickness Dependence of Impact Ionization in a Multiple-Gate FinFET , 2007, IEEE Electron Device Letters.

[7]  A. Tasch,et al.  A pseudo-lucky electron model for simulation of electron gate current in submicron NMOSFET's , 1996 .

[8]  N. C. Das,et al.  Hot carrier induced interface trap annealing in silicon field effect transistors , 1993 .

[9]  E. Takeda,et al.  Device performance degradation to hot-carrier injection at energies below the Si-SiO2energy barrier , 1983, 1983 International Electron Devices Meeting.

[10]  Esteve Amat,et al.  Gate Voltage Influence on the Channel Hot-Carrier Degradation of High-$k$ -Based Devices , 2011, IEEE Transactions on Device and Materials Reliability.

[11]  E. Cartier,et al.  MECHANISM FOR STRESS-INDUCED LEAKAGE CURRENTS IN THIN SILICON DIOXIDE FILMS , 1995 .

[12]  A. Bravaix,et al.  The Energy-Driven Hot-Carrier Degradation Modes of nMOSFETs , 2007, IEEE Transactions on Device and Materials Reliability.

[13]  Ping-Keung Ko,et al.  Hot-carrier current modeling and device degradation in surface-channel p-MOSFETs , 1990 .