Design of Complex Non-Linear Adaptive Equalizer in Mitigating Severe Intersymbol Interferences
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[1] Tobias G. Noll. Carry-save architectures for high-speed digital signal processing , 1991, J. VLSI Signal Process..
[2] Ayan Banerjee,et al. FPGA realization of a CORDIC based FFT processor for biomedical signal processing , 2001, Microprocess. Microsystems.
[3] S. Haykin,et al. Adaptive Filter Theory , 1986 .
[4] Teresa H. Y. Meng,et al. A robust adaptive parallel DFE using extended LMS , 1993, IEEE Trans. Signal Process..
[5] Lajos Hanzo,et al. MBER Space-Time Decision Feedback Equalization Assisted Multiuser Detection for Multiple Antenna Aided SDMA Systems , 2006, IEEE Transactions on Signal Processing.
[6] B. Farhang-Boroujeny,et al. Adaptive Filters: Theory and Applications , 1999 .
[7] Keshab K. Parhi,et al. Pipelined adaptive DFE architectures using relaxed look-ahead , 1995, IEEE Trans. Signal Process..
[8] Sang Yoon Park,et al. CORDIC Designs for Fixed Angle of Rotation , 2013, IEEE Transactions on Very Large Scale Integration (VLSI) Systems.
[9] Yu Hen Hu,et al. The quantization effects of the CORDIC algorithm , 1992, IEEE Trans. Signal Process..
[10] Luca Barletta,et al. Efficient Computation of the Feedback Filter for the Hybrid Decision Feedback Equalizer in Highly Dispersive Channels , 2012, IEEE Transactions on Wireless Communications.
[11] K. Sridharan,et al. 50 Years of CORDIC: Algorithms, Architectures, and Applications , 2009, IEEE Transactions on Circuits and Systems I: Regular Papers.
[12] Wonyong Sung,et al. VLSI Implementation of An Adaptive Equalizer for ATSC Digital TV Receivers , 2005, J. VLSI Signal Process..
[13] Yu Hen Hu,et al. CALF: a CORDIC adaptive lattice filter , 1992, IEEE Trans. Signal Process..
[14] Brajesh Kumar Kaushik,et al. Design of LMS Adaptive Radar Detector for Non-homogeneous Interferences , 2016 .
[15] Shyh-Jye Jou,et al. High throughput concurrent lookahead adaptive decision feedback equaliser , 2012, IET Circuits Devices Syst..
[16] Koushik Maharatna,et al. A CORDIC-Based Low-Power Statistical Feature Computation Engine for WSN Applications , 2015, Circuits Syst. Signal Process..
[17] Keshab K. Parhi,et al. Parallel adaptive decision feedback equalizers , 1993, IEEE Trans. Signal Process..
[18] Ayan Banerjee,et al. Pipelined VLSI Architecture using CORDIC for Transform Domain Equalizer , 2012, Journal of Signal Processing Systems.
[19] Anindya Sundar Dhar,et al. CORDIC realization of the transversal adaptive filter using a trigonometric LMS algorithm , 2001, 2001 IEEE International Conference on Acoustics, Speech, and Signal Processing. Proceedings (Cat. No.01CH37221).
[20] Mrityunjoy Chakraborty,et al. A block floating point treatment to finite precision realization of the adaptive decision feedback equalizer , 2013, Signal Process..
[21] Moon Ho Lee,et al. A trigonometric formulation of the LMS algorithm for realization on pipelined CORDIC , 2005, IEEE Transactions on Circuits and Systems II: Express Briefs.
[22] T. Sansaloni,et al. Efficient Mapping of CORDIC Algorithm for OFDM-Based WLAN , 2008, J. Signal Process. Syst..
[23] C. K. Ng,et al. Modified Booth pipelined multiplication , 1998 .
[24] Y.H. Hu,et al. CORDIC-based VLSI architectures for digital signal processing , 1992, IEEE Signal Processing Magazine.
[25] An-Yeu Wu,et al. Fast convergent pipelined adaptive DFE architecture using post-cursor processing filter technique , 2004, IEEE Transactions on Circuits and Systems II: Express Briefs.
[26] A. Mandal,et al. Coordinate rotation algorithm based non-linear Adaptive Decision Feedback Equalizer , 2012, International Multi-Conference on Systems, Sygnals & Devices.
[27] Jack E. Volder. The CORDIC Trigonometric Computing Technique , 1959, IRE Trans. Electron. Comput..
[28] Shiann-Rong Kuang,et al. Modified Booth Multipliers With a Regular Partial Product Array , 2009, IEEE Transactions on Circuits and Systems II: Express Briefs.
[29] Gerhard Tröster,et al. An Efficient VLSI Architecture for Computing Decision Feedback Equalizer Coefficients from the Channel State Information , 2003, J. VLSI Signal Process..
[30] Mrityunjoy Chakraborty,et al. Pipelining the adaptive decision feedback equalizer with zero latency , 2003, Signal Process..
[31] Earl E. Swartzlander,et al. A Reduced Complexity Wallace Multiplier Reduction , 2010, IEEE Transactions on Computers.