A low-cost media-processor based real-time MPEG-4 video decoder

In this paper by implementing a realistic MPEG-4 core profile decoder over the TriMedia/spl trade/ DSP chip, we investigate a series of important issues related to the use of a media-processor to satisfy multimedia compression and processing requirements. The realistic MPEG-4 decoder optimized implementation by this DSP chip can support resolutions up to 4 CIF (720/spl times/576) at 30 fps. The issues we investigated include the overview of characteristics of media-processor architecture, the speedup of the MPEG-4 decoder based on the TriMedia/spl trade/ DSP chip, multimedia co-processor or hardware accelerator based approaches, Very Long Instruction Word (VLIW) and Single Instruction Multiple Data (SIMD) programming technique and the media-processor based solution for set-top box applications.

[1]  K. Ramkishor,et al.  Real time implementation of MPEG-4 video decoder on ARM7TDMI , 2001, Proceedings of 2001 International Symposium on Intelligent Multimedia, Video and Speech Processing. ISIMP 2001 (IEEE Cat. No.01EX489).

[2]  Thinh M. Le,et al.  A low-power and scalable MPEG-4 solution for wireless communications , 2001, ICCE. International Conference on Consumer Electronics (IEEE Cat. No.01CH37182).

[3]  Giovanni L. Sicuranza,et al.  Hardware-oriented region based algorithm for low power motion estimation , 2001, ISPA 2001. Proceedings of the 2nd International Symposium on Image and Signal Processing and Analysis. In conjunction with 23rd International Conference on Information Technology Interfaces (IEEE Cat..

[4]  Andy D. Pimentel,et al.  TriMedia CPU64 architecture , 1999, Proceedings 1999 IEEE International Conference on Computer Design: VLSI in Computers and Processors (Cat. No.99CB37040).

[5]  Fernando Pereira.  MPEG-4: Why, what, how and when? , 2000, Signal Process. Image Commun..

[6]  Touradj Ebrahimi,et al.  MPEG-4 natural video coding - An overview , 2000, Signal Process. Image Commun..

[7]  Ja-Ling Wu,et al.  MMX-based DCT and MC algorithms for real-time pure software MPEG decoding , 1999, Proceedings IEEE International Conference on Multimedia Computing and Systems.

[8]  Jan-Willem van de Waerdt,et al.  TriMedia CPU64 application development environment , 1999, Proceedings 1999 IEEE International Conference on Computer Design: VLSI in Computers and Processors (Cat. No.99CB37040).

[9]  Prashant Jain,et al.  Dynamically parameterized architectures for power-aware video coding: motion estimation and DCT , 2001, Proceedings Second International Workshop on Digital and Computational Video.

[10]  Y. Arai,et al.  A Fast DCT-SQ Scheme for Images , 1988 .