Performance evaluation of memory systems

We address the issues related to the performance evaluation of the memory system in this paper. Our focus is on the problem of mismatches between block transfer time/rate among levels of the memory hierarchy. We discuss solutions, which would help reduce the effects of this problem. We provide a step-by-step approach for the evaluation of a new design. We consider both asynchronous and synchronous disk interleaving techniques and how they should be evaluated against extended-hierarchy of memory systems. We identify all the steps that are needed to make a selection among these techniques, in order to improve the performance of the computer memory system.