Method for setting up test mode in semiconductor chip

The test mode setting method of a semiconductor chip and thus the suitable apparatus is disclosed in accordance with the present invention. Device for setting a plurality of test modes in accordance with the present invention is test pin;, certain external pins used for intended purpose;, depending on the signal applied to the test pin, applied to the test mode, the external pins activation signal transmission gate means having a number corresponding to the external pins to control;, latch means having a number corresponding to the transfer gate means for storing the output signal of the transfer gate means; said test pin signal level applied to the , depending on the power supplied from the external device a flip-flop to determine the output thereof;, a logical sum by a signal applied to the test pin, the output signal and the output signal of said flip-flop means of the latch are each input to the result according to the logic gate to activate a test mode set by said external pins; And an encoder for generating a plurality of test modes for encoding the test mode activation signal of the logic gate. Accordingly, the test mode is set in the chip according to the present invention as described above has an effect that can remove the logic high voltage test mode and easily support a test mode in many cases.