A pipeline ADC with latched-based ring amplifiers

In comparison with conventional operational amplifier, ring amplifier can achieve better power efficiency for switched capacitor circuits. However, the cascade-inverter architecture of ring amplifier may suffer from undesirable oscillation which has a great impact on transient stability. This paper presents a latched-based ring amplifier which is capable of decreasing the probability of oscillation. Besides, two auto-zero schemes are employed in different pipelined stages to reduce the common-mode voltage offset and to increase the stability. The prototype ADC was fabricated in a 90-nm CMOS technology. The measured SNDR and SFDR are 52.06 dB and 63. 15 dB, respectively, for a Nyquist frequency input sampled at 35 MS/s, and the ADC consumes 3.65 mW.

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