Direct ΣΔ Bitstream Processing for High Performance Feedback Control

The design, noise, and performance analysis of a digital controller architecture directly processing $\Sigma\triangle$ bitstreams is described. This substantially reduces control latency by removing the bitstream conversion step. The controller has a small footprint and low power dissipation from multiplierless design. Based on integrated state variables, the controller achieves stable implementation of a wide range of controller designs with near continuous time performance. A method for estimating the controller SNR using $\Sigma\triangle$ bitstream signal and noise characteristics is outlined. A low latency example, a Q controller for an atomic force microscope cantilever was designed and simulated. The $\Sigma\triangle$ controller achieved similar performance to the ideal continuous time model and surpass conventional DSP equivalent while maintaining high output resolution and fitting easily into an inexpensive micro-power FPGA.