A 1.2V-5V High Efficiency CMOS Charge Pump for Non-Volatile Memories
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[1] Angela Arapoyanni,et al. A CMOS charge pump for low voltage operation , 2000, 2000 IEEE International Symposium on Circuits and Systems. Emerging Technologies for the 21st Century. Proceedings (IEEE Cat No.00CH36353).
[2] Jieh-Tsorng Wu,et al. MOS charge pumps for low-voltage operation , 1998, IEEE J. Solid State Circuits.
[3] M. Pasotti,et al. Power efficient charge pump in deep submicron standard CMOS technology , 2003, Proceedings of the 27th European Solid-State Circuits Conference.
[4] Chia-Hung Wei,et al. A CMOS charge pump for sub-2.0 V operation , 2003, Proceedings of the 2003 International Symposium on Circuits and Systems, 2003. ISCAS '03..
[5] Y. J. Park,et al. A new charge pump without degradation in threshold voltage due to body effect [memory applications] , 2000, IEEE Journal of Solid-State Circuits.
[6] L. Colalongo,et al. A new integrated charge pump architecture using dynamic biasing of pass transistors , 2005, Proceedings of the 31st European Solid-State Circuits Conference, 2005. ESSCIRC 2005..
[7] G. Palumbo,et al. Charge-pump circuits: power-consumption optimization , 2002 .