A new small-swing domino logic for low-power consumption

In this paper, we propose new small swing domino logic for low-power consumption. To reduce the power consumption, both the precharge node and the output node swing the range from 0 to VREF-VTHN, where VREF=VDD-nVTHN. This can be done by the inverter structure that allows a full swing or a small swing on its input terminal without leakage current. Compared to the small swing domino circuit of the previous works, the proposed structure can save the power consumption of more than 30% for n=1, 2, and 3 in the equation of VREF=VDD-nVTHN.

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