Speed optimization for tasks with two resources

Multiple resource co-scheduling algorithms and pipelined execution models are becoming increasingly popular, as they better capture the heterogeneous nature of modern architectures. The problem of scheduling tasks composed of multiple stages tied to different resources goes under the name of “flow-shop scheduling”. This problem, studied since the '50s to optimize production plants, is known to be NP-hard in the general case. In this paper, we consider a specific instance of the flow-shop task model that captures the behavior of a two-resource (DMA-CPU) system. In this setting, we study the problem of selecting the optimal operating speed of either resource with the goal of minimizing power consumption while meeting schedulability constraints. We derive an algorithm that finds an exact solution to the problem in polynomial time, hence it is suitable for online operation even in the presence of variable real-time workload.

[1]  Rodolfo Pellizzoni,et al.  Memory efficient global scheduling of real-time tasks , 2015, 21st IEEE Real-Time and Embedded Technology and Applications Symposium.

[2]  Marco Caccamo,et al.  A Predictable Execution Model for COTS-Based Embedded Systems , 2011, 2011 17th IEEE Real-Time and Embedded Technology and Applications Symposium.

[3]  Rodolfo Pellizzoni,et al.  A Dynamic Scratchpad Memory Unit for Predictable Real-Time Embedded Systems , 2013, 2013 25th Euromicro Conference on Real-Time Systems.

[4]  Giorgio C. Buttazzo,et al.  Memory-processor co-scheduling in fixed priority systems , 2015, RTNS.

[5]  Lothar Thiele,et al.  Resource Speed Optimization for Two-Stage Flow-Shop Scheduling , 2015 .

[6]  Marco Caccamo,et al.  Memory-centric scheduling for multicore hard real-time systems , 2012, Real-Time Systems.

[7]  Gerhard J. Woeginger,et al.  A polynomial time approximation scheme for the two-stage multiprocessor flow shop problem , 2000, Theor. Comput. Sci..

[8]  Bo Chen Analysis of Classes of Heuristics for Scheduling a Two-Stage Flow Shop with Parallel Machines at One Stage , 1995 .

[9]  Ravi Sethi,et al.  The Complexity of Flowshop and Jobshop Scheduling , 1976, Math. Oper. Res..

[10]  Heonshik Shin,et al.  Scratchpad memory management in a multitasking environment , 2008, EMSOFT '08.

[11]  Jan Karel Lenstra,et al.  PREEMPTIVE SCHEDULING IN A TWO-STAGE MULTIPROCESSOR FLOW SHOP IS NP-HARD , 1996 .

[12]  S. M. Johnson,et al.  Optimal two- and three-stage production schedules with setup times included , 1954 .

[13]  Rodolfo Pellizzoni,et al.  Hiding memory latency using fixed priority scheduling , 2014, 2014 IEEE 19th Real-Time and Embedded Technology and Applications Symposium (RTAS).