Application of self organizing maps for investigating network latency on a broadcast-based distributed shared memory multiprocessor

Broadcast-based DSM multiprocessors are nowadays an attractive platform for parallel computing due to their advantages in terms of scalability and programmability. In order to obtain high performance out of these systems, network latency reduction techniques should be developed, which requires the knowledge of the relationship between latency and other important DSM parameters. In this paper, self organizing maps (SOM) are used to investigate the effect of DSM parameters on network latency for a multiprocessor architecture interconnected by the Simultaneous Optical Multiprocessor Exchange Bus (SOME-Bus). An event-based discrete simulator using OPNET Modeler is developed for simulating a SOME-Bus system containing 64-nodes. Two thousand data points have been collected in order to create the dataset used in this study. 2-dimensional (2D) maps are produced by using SOM to display the relationship between network latency and other parameters such as the miss rate to a modified block (P"m), fraction of write misses (P"w), probability of having an upgrade ownership request message (P"u"o"r), probability of having a cache full (P"c"f) and ratio of the mean thread run time to mean message transfer time (T/R). The results show that the most dominant DSM parameter effecting network latency is T/R, while P"c"f has the minimum affect on network latency among other parameters. The individual effect of P"m, P"w and P"u"o"r on network latency depends on the values of all other parameters.

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