Linking design and test tools: an implementation

A computer-aided test analysis system was designed to appraise the testability of logic systems and to provide the functional specification of the test programs. To provide a helpful tool for both designers and test engineers, it was necessary to fully integrate this tool in a CAD (computer-aided design) system so that testability might be a design parameter and to automate the test-program production. The authors present the link between this tool and the SILVAR LISCO design system. >

[1]  Daniel P. Siewiorek,et al.  Functional Testing of Digital Systems , 1983, 20th Design Automation Conference Proceedings.

[2]  H. Ando,et al.  Testing VLSI with Random Access Scan , 1980 .

[3]  Premachandran R. Menon,et al.  Test Generation Algorithms for Computer Hardware Description Languages , 1982, IEEE Transactions on Computers.

[4]  James R. Armstrong.  Chip Level Modeling With Vhdl , 1988 .

[5]  John Grason,et al.  TMEAS, A Testability Measurement Program , 1979, 16th Design Automation Conference.

[6]  Hideo Fujiwara,et al.  On the Acceleration of Test Generation Algorithms , 1983, IEEE Transactions on Computers.

[7]  S. DasGupta,et al.  LSI chip design for testability , 1978, 1978 IEEE International Solid-State Circuits Conference. Digest of Technical Papers.

[8]  Melvin A. Breuer,et al.  Functional Level Primitives in Test Generation , 1980, IEEE Transactions on Computers.

[9]  Prabhakar Goel,et al.  PODEM-X: An Automatic Test Generation System for VLSI Logic Structures , 1981, 18th Design Automation Conference.

[10]  Chantal Robach,et al.  CATA: A Computer-Aided Test Analysis System , 1984, IEEE Design & Test of Computers.

[11]  Thomas W. Williams,et al.  Design for Testability - A Survey , 1982, IEEE Trans. Computers.

[12]  John J. Dent.  Diagnostic engineering requirements , 1968, AFIPS '68 (Spring).

[13]  F.P.M. Beenker,et al.  Macro Testing: Unifying IC And Board Test , 1986, IEEE Design & Test of Computers.

[14]  R. G. Bennetts,et al.  Erratum: CAMELOT: a computer-aided measure for logic testability , 1981 .

[15]  John P. Hayes,et al.  Hierarchical test generation using precomputed testsd for modules , 1988, International Test Conference 1988 Proceeding@m_New Frontiers in Testing.

[16]  John P. Hayes,et al.  Hierarchical test generation using precomputed tests for modules , 1990, IEEE Trans. Comput. Aided Des. Integr. Circuits Syst..

[17]  L. H. Goldstein,et al.  SCOAP: Sandia Controllability/Observability Analysis Program , 1988, 17th Design Automation Conference.

[18]  Toshihiro Arima,et al.  Test generation systems in Japan , 1975, DAC '75.

[19]  Chantal Robach,et al.  Testability measures: A Review , 1988, Comput. Syst. Sci. Eng..

[20]  J. Paul Roth,et al.  Diagnosis of automata failures: a calculus and a method , 1966 .

[21]  S. M. Lea,et al.  Expert system for the functional test program generation of digital electronic circuit boards , 1988, International Test Conference 1988 Proceeding@m_New Frontiers in Testing.

[22]  Premachandran R. Menon,et al.  Test Generation In Lamp2: Concepts and Algorithms , 1985, ITC.