A 5.4-GHz Low-Power Swallow-Conterless Frequency Synthesizer with a Nonliear PFD

A 5.4-GHz swallow-counterless CMOS frequency synthesizer with a nonlinear phase frequency detector (PFD) is presented. With the same total division ratio, the proposed divider can effectively decrease the gate-counts so as to consume less power than that of the traditional ones. The designed fast-locked nonlinear PFD can enhance the switching speed while remaining the loop stability unchanged. The phase noise of the frequency synthesizer is -135dBc/Hz at 10 MHz offset in a 0.18mum CMOS process. The switching time is within 5mus. The power consumption is only 7mW with 1.5V supply voltage. The implemented frequency synthesizer occupies a small chip area of 0.78mm2

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