A Binaural Neuromorphic Auditory Sensor for FPGA: A Spike Signal Processing Approach

This paper presents a new architecture, design flow, and field-programmable gate array (FPGA) implementation analysis of a neuromorphic binaural auditory sensor, designed completely in the spike domain. Unlike digital cochleae that decompose audio signals using classical digital signal processing techniques, the model presented in this paper processes information directly encoded as spikes using pulse frequency modulation and provides a set of frequency-decomposed audio information using an address-event representation interface. In this case, a systematic approach to design led to a generic process for building, tuning, and implementing audio frequency decomposers with different features, facilitating synthesis with custom features. This allows researchers to implement their own parameterized neuromorphic auditory systems in a low-cost FPGA in order to study the audio processing and learning activity that takes place in the brain. In this paper, we present a 64-channel binaural neuromorphic auditory system implemented in a Virtex-5 FPGA using a commercial development board. The system was excited with a diverse set of audio signals in order to analyze its response and characterize its features. The neuromorphic auditory system response times and frequencies are reported. The experimental results of the proposed system implementation with 64-channel stereo are: a frequency range between 9.6 Hz and 14.6 kHz (adjustable), a maximum output event rate of 2.19 Mevents/s, a power consumption of 29.7 mW, the slices requirements of 11141, and a system clock frequency of 27 MHz.

[1]  Bernabé Linares-Barranco,et al.  On algorithmic rate-coded AER generation , 2006, IEEE Transactions on Neural Networks.

[2]  Monk-Ping Leong,et al.  An FPGA-Based Electronic Cochlea , 2003, EURASIP J. Adv. Signal Process..

[3]  Tobi Delbrück,et al.  Using FPGA for visuo-motor control with a silicon retina and a humanoid robot , 2007, 2007 IEEE International Symposium on Circuits and Systems.

[4]  Tobi Delbrück,et al.  Event-based 64-channel binaural silicon cochlea with Q enhancement mechanisms , 2010, Proceedings of 2010 IEEE International Symposium on Circuits and Systems.

[5]  Bernabé Linares-Barranco,et al.  On Real-Time AER 2-D Convolutions Hardware for Neuromorphic Spike-Based Cortical Processing , 2008, IEEE Transactions on Neural Networks.

[6]  Angel Jiménez-Fernandez,et al.  Building blocks for spikes signals processing , 2010, The 2010 International Joint Conference on Neural Networks (IJCNN).

[7]  M. Domínguez-Morales,et al.  On the Designing of Spikes Band-Pass Filters for FPGA , 2011, ICANN.

[8]  Richard F. Lyon,et al.  An analog electronic cochlea , 1988, IEEE Trans. Acoust. Speech Signal Process..

[9]  M. Domínguez-Morales,et al.  Spikes Monitors for FPGAs, an Experimental Comparative Study , 2013, IWANN.

[10]  Ivan Grech,et al.  Digital cochlea model implementation using Xilinx XC3S500E Spartan-3E FPGA , 2010, 2010 17th IEEE International Conference on Electronics, Circuits and Systems.

[11]  Danwei Wang,et al.  CPG-Inspired Workspace Trajectory Generation and Adaptive Locomotion Control for Quadruped Robots , 2011, IEEE Transactions on Systems, Man, and Cybernetics, Part B (Cybernetics).

[12]  Deniz Başkent,et al.  Simulating listener errors in using genetic algorithms for perceptual optimization. , 2007, The Journal of the Acoustical Society of America.

[13]  Mrityunjaya V. Latte,et al.  Digital Filter for Cochlear Implant Implemented on a Field- Programmable Gate Array , 2008 .

[14]  Richard F. Lyon,et al.  ASIC implementation of the Lyon cochlea model , 1992, [Proceedings] ICASSP-92: 1992 IEEE International Conference on Acoustics, Speech, and Signal Processing.

[15]  Giacomo Indiveri,et al.  A VLSI array of low-power spiking neurons and bistable synapses with spike-timing dependent plasticity , 2006, IEEE Transactions on Neural Networks.

[16]  Misha Anne Mahowald,et al.  VLSI analogs of neuronal visual processing: a synthesis of form and function , 1992 .

[17]  Angel Jiménez-Fernandez,et al.  Synthetic retina for AER systems development , 2009, 2009 IEEE/ACS International Conference on Computer Systems and Applications.

[18]  Gert Cauwenberghs,et al.  An analog VLSI chip with asynchronous interface for auditory feature extraction , 1997, Proceedings of 1997 IEEE International Symposium on Circuits and Systems. Circuits and Systems in the Information Age ISCAS '97.

[19]  Alejandro Linares-Barranco,et al.  Two Hardware Implementations of the Exhaustive Synthetic AER Generation Method , 2005, IWANN.

[20]  B H SHUSTER,et al.  Physiology of the ear. , 1952, A.M.A. archives of otolaryngology.

[21]  Tobi Delbrück,et al.  CAVIAR: A 45k Neuron, 5M Synapse, 12G Connects/s AER Hardware Sensory–Processing– Learning–Actuating System for High-Speed Visual Object Recognition and Tracking , 2009, IEEE Transactions on Neural Networks.

[22]  Antonio Rios-Navarro,et al.  Real-time motor rotation frequency detection with event-based visual and spike-based auditory AER sensory integration for FPGA , 2015, 2015 International Conference on Event-based Control, Communication, and Signal Processing (EBCCSP).

[23]  John Wawrzynek,et al.  A multi-sender asynchronous extension to the AER protocol , 1995, Proceedings Sixteenth Conference on Advanced Research in VLSI.

[24]  Tobi Delbrück,et al.  A 5 Meps $100 USB2.0 Address-Event Monitor-Sequencer Interface , 2007, 2007 IEEE International Symposium on Circuits and Systems.

[25]  Juan López Coronado,et al.  Neuro-Inspired Spike-Based Motion: From Dynamic Vision Sensor to Robot Motor Open-Loop Control through Spike-VITE , 2013, Sensors.

[26]  Chak-Kuen Wong,et al.  An FPGA-Based Electronic Cochlea with Dual Fixed-Point Arithmetic , 2006, 2006 International Conference on Field Programmable Logic and Applications.

[27]  Allyn E. Hubbard,et al.  A cochlear filter implemented with a field-programmable gate array , 2002 .

[28]  Bo Wen,et al.  A Silicon Cochlea With Active Coupling , 2009, IEEE Transactions on Biomedical Circuits and Systems.

[29]  Angel Jiménez-Fernandez,et al.  Spike-based control monitoring and analysis with Address Event Representation , 2009, 2009 IEEE/ACS International Conference on Computer Systems and Applications.

[30]  Craig T. Jin,et al.  An Active 2-D Silicon Cochlea , 2008, IEEE Transactions on Biomedical Circuits and Systems.

[31]  T. Delbruck,et al.  > Replace This Line with Your Paper Identification Number (double-click Here to Edit) < 1 , 2022 .

[32]  André van Schaik,et al.  FPGA implementation of the CAR Model of the cochlea , 2014, 2014 IEEE International Symposium on Circuits and Systems (ISCAS).

[33]  Ralph Etienne-Cummings,et al.  AER Auditory Filtering and CPG for Robot Control , 2007, 2007 IEEE International Symposium on Circuits and Systems.

[34]  Ivan Grech,et al.  FPGA active digital cochlea model , 2011, 2011 18th IEEE International Conference on Electronics, Circuits, and Systems.

[35]  Andrew S. Cassidy,et al.  Cognitive computing building block: A versatile and efficient digital neuron model for neurosynaptic cores , 2013, The 2013 International Joint Conference on Neural Networks (IJCNN).

[36]  Richard F. Lyon,et al.  A computational model of filtering, detection, and compression in the cochlea , 1982, ICASSP.

[37]  David E. Goldberg,et al.  Genetic Algorithms in Search Optimization and Machine Learning , 1988 .

[38]  Philipp Häfliger.  Adaptive WTA With an Analog VLSI Neuromorphic Learning Chip , 2007, IEEE Transactions on Neural Networks.

[39]  M. Domínguez-Morales,et al.  Musical notes classification with neuromorphic auditory system using FPGA and a convolutional spiking network , 2015, 2015 International Joint Conference on Neural Networks (IJCNN).

[40]  Trevor Bekolay,et al.  Nengo: a Python tool for building large-scale functional brain models , 2014, Front. Neuroinform..

[41]  M. Domínguez-Morales,et al.  A Neuro-Inspired Spike-Based PID Motor Controller for Multi-Motor Robots with Low Cost FPGAs , 2012, Sensors.

[42]  R. Sarpeshkar,et al.  An analog bionic ear processor with zero-crossing detection , 2005, ISSCC. 2005 IEEE International Digest of Technical Papers. Solid-State Circuits Conference, 2005..

[43]  Tobi Delbrück,et al.  A 128$\times$ 128 120 dB 15 $\mu$s Latency Asynchronous Temporal Contrast Vision Sensor , 2008, IEEE Journal of Solid-State Circuits.