Overflow handling in inner-product processors

Several DSP applications demand high speed inner-product processors (IPP). Most current implementations of IPP use the multiply-accumulate (MAC) concept to perform the IP operations. Rather than using MAC accumulate to perform the IP operation, the authors show two superior designs, MIPP and CSIPP, that outperform the standard implementations. The speed improvement ratio is estimated to be between 2 to 4 for both designs. The paper also presents a new technique to detect and correct overflow occurrence in MIPP and CSIPP.

[1]  F. El-Guibaly,et al.  Systolic implementation of linear-phase FIR filters , 1993, Proceedings of Canadian Conference on Electrical and Computer Engineering.

[2]  F. El-Guibaly,et al.  High-speed area-efficient inner-product processor , 1994, Canadian Journal of Electrical and Computer Engineering.

[3]  Andreas Antoniou,et al.  VLSI array processors for linear-phase FIR filters , 1995 .

[4]  L. Jackson.  Digital filters and signal processing , 1985 .

[5]  Andreas Antoniou,et al.  Efficient decimator and interpolator Array Structures , 1995, J. Circuits Syst. Comput..

[6]  Bruce A. Wooley,et al.  A Two's Complement Parallel Array Multiplication Algorithm , 1973, IEEE Transactions on Computers.

[7]  Nikitas A. Alexandridis.  Microprocessor system design concepts , 1984 .

[8]  M. O. Ahmad,et al.  Design of an efficient VLSI inner-product processor for real-time DSP applications , 1989 .

[9]  HARVEY L. GARNER.  Theory of Computer Addition and Overflows , 1978, IEEE Transactions on Computers.

[10]  Dale J. Shpak,et al.  Design of novel serial-parallel inner-product processors , 1994, Proceedings of IEEE International Symposium on Circuits and Systems - ISCAS '94.

[11]  Michael G. Taylor,et al.  Overflow oscillations in digital filters , 1969 .

[12]  Joseph J. F. Cavanagh.  Digital Computer Arithmetic: Design And Implementation , 1984 .

[13]  Kai Hwang,et al.  Computer arithmetic: Principles, architecture, and design , 1979 .

[14]  Alan V. Oppenheim,et al.  Discrete-Time Signal Pro-cessing , 1989 .

[15]  O. L. Macsorley.  High-Speed Arithmetic in Binary Computers , 1961, Proceedings of the IRE.

[16]  F. El-Guibaly,et al.  Efficient systolic implementation of fixed-point state-space digital filter , 1993, Proceedings of Canadian Conference on Electrical and Computer Engineering.

[17]  Panajotis Agathoklis,et al.  Systolic implementation of fixed-point state-space digital filter , 1995 .

[18]  F. El-Guibaly,et al.  A new inner-product processor for FIR filter implementation , 1995, IEEE Pacific Rim Conference on Communications, Computers, and Signal Processing. Proceedings.

[19]  Andreas Antoniou,et al.  Digital Filters: Analysis, Design and Applications , 1979 .

[20]  Michael J. Flynn,et al.  Introduction to Arithmetic for Digital Systems Designers , 1995 .