论文信息 - A difference detector PFD for low jitter PLL

A difference detector PFD for low jitter PLL

For high speed and low jitter PLL application, a new phase frequency detector (PFD) with difference detector is proposed. Because the proposed difference detector PFD (dd-PFD) doesn't have any feedback path in phase frequency detector circuit, it can be operated up to 1.6 GHz. Furthermore, with difference detector, the dd-PFD has three states, so it will not have phase errors and jitter problems. The dead zone of dd-PFD is 16 ps. The proposed PFD is designed using 0.35 /spl mu/m CMOS technology at 3.3 V power supply.

Wei-Bin Yang | Kuo-Hsing Cheng | Shu-Yu Jiang | Tse-Hua Yao

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