A Re-configurable FTL (Flash Translation Layer) Architecture for NAND Flash based Applications
暂无分享,去创建一个
[1] ChiangMei-Ling,et al. Using data clustering to improve cleaning performance for plash memory , 1999 .
[2] Tei-Wei Kuo,et al. An adaptive striping architecture for flash memory storage systems of embedded systems , 2002, Proceedings. Eighth IEEE Real-Time and Embedded Technology and Applications Symposium.
[3] Sang Lyul Min,et al. A space-efficient flash translation layer for CompactFlash systems , 2002, IEEE Trans. Consumer Electron..
[4] Sivan Toledo,et al. Algorithms and data structures for flash memories , 2005, CSUR.
[5] Heeseung Jo,et al. A superblock-based flash translation layer for NAND flash memory , 2006, EMSOFT '06.
[6] 阿米尔·班. Flash File System , 1994 .
[7] David A. Patterson,et al. Computer Architecture - A Quantitative Approach (4. ed.) , 2007 .
[8] Sang-Won Lee,et al. A log buffer-based flash translation layer using fully-associative sector translation , 2007, TECS.
[9] Tei-Wei Kuo,et al. An efficient management scheme for large-scale flash-memory storage systems , 2004, SAC '04.