Fault simulation for analog test coverage

A practical fault simulation methodology for analog circuits in mixed-signal designs is presented. The methodology leverages the mixed-signal simulation environment of a product and performs mixed-signal fault simulation of embedded analog circuits. A set of open-circuit and short-circuit faults are extracted with guidance from layout parasitics, and automatically injected in to the net list. Fault coverage of manufacturing tests on faults in the transmitter of a high speed serial interface design are reported with two different observation criteria. Results indicate the amount of test reduction that can be achieved and the importance of appropriate observation in fault detection.

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