Digital Nonlinear Oscillators in PLDs: Pitfalls and Open Perspectives for a Novel Class of True Random Number Generators

In this brief we outline a novel perspective for the design of True Random Number Generators in Programmable Logic Devices (PLDs), proposing to bring together PLD design, circuit modeling and the analysis of nonlinear dynamical systems. Although the discussion and experimental results provided in this work refer to FPGA design, the reasoning and concepts have general validity, being easily adaptable to other kind of PLDs, e.g., Complex PLDs (CPLDs). We introduce a novel class of systems, that have been generically named Digital Nonlinear Oscillators, exhibiting complex periodic dynamical behavior, proposing topologies based on Ring Oscillators embedded in looped structures using digital delay blocks and XOR gates. We compared the proposed systems with other solutions proposed in literature, discussing the circuit operation and its nonlinear dynamical behavior.

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