SEUs tolerance in FPGAs based digital LLRF system for XFEL
暂无分享,去创建一个
The rapidly developing semiconductor technology allows to implement sophisticated digital control in the programmable devices platforms (FPGAs, CPUs). However the increasing size and performance of the circuits has also a drawback at the failure sensitivity, in particular for soft errors due to ionizing radiation. The sensitivity to SEUs is related to the critical charge which strongly depends on the transistor dimensions and supplying voltage. The sensitivity to ionizing radiation increases faster than the circuits complexity due to Moore's law. Therefore the life critical systems and systems operating in radioactive environment have to deal with soft errors. The countermeasure can be special design techniques introducing the redundancy to the algorithms and/or circuit design allowing to detect and correct errors. The goal is to find the compromise between cost, performance and reliability. The development of such algorithms and systems must be supported by the test stand where the resistance to radiation influence can be evaluated.
[1] Lloyd W. Massengill,et al. Basic mechanisms and modeling of single-event upset in digital microelectronics , 2003 .
[2] Grzegorz Jablonski,et al. Improvements of SEU tolerance by spatial redundancy in digital circuits , 2009, 2009 MIXDES-16th International Conference Mixed Design of Integrated Circuits & Systems.
[3] R. Baumann,et al. Neutron-induced boron fission as a major source of soft errors in deep submicron SRAM devices , 2000, 2000 IEEE International Reliability Physics Symposium Proceedings. 38th Annual (Cat. No.00CH37059).