Ideograph/ideogram: framework/hardware for eager evaluation

Ideograph integrates data and control dependencies into a unified representation and is used to precisely characterize the concepts of branch prediction and eager evaluation. The Ideogram computer is designed to execute Ideographs. Unlike dataflow computers, The Ideogram computer accepts a 3-address code language called igf. Through igf, Ideographs are constructed and executed by the Ideogram computer at run-time. In this paper, the descriptions of both Ideograph and Ideogram computer are introduced, and the preliminary benchmark results are included.<<ETX>>

[1]  V. G. Grafe,et al.  The Epsilon dataflow processor , 1989, ISCA '89.

[2]  Joseph A. Fisher.  The VLIW Machine: A Multiprocessor for Compiling Scientific Code , 1984, Computer.

[3]  Edward M. Riseman,et al.  The Inhibition of Potential Parallelism by Conditional Jumps , 1972, IEEE Transactions on Computers.

[4]  R. M. Tomasulo,et al.  An efficient algorithm for exploiting multiple arithmetic units , 1995 .

[5]  Tilak Agerwala,et al.  Data Flow Systems: Guest Editors' Introduction , 1982, Computer.

[6]  H. M. Vin,et al.  Controlled eager evaluation in a Dynamic-Arc Tagged-Token Dataflow Model , 1989 .

[7]  Joe D. Warren,et al.  The program dependence graph and its use in optimization , 1984, TOPL.

[8]  David A. Padua,et al.  High-Speed Multiprocessors and Compilation Techniques , 1980, IEEE Transactions on Computers.

[9]  Augustus K. Uht,et al.  Program Optimization with Ideograph , 1989, ICPP.

[10]  J. E. Thornton,et al.  Parallel operation in the control data 6600 , 1964, AFIPS '64 (Fall, part II).

[11]  Pen-Chung Yew,et al.  Some results on exact data dependence analysis , 1990 .

[12]  John F. Kolen,et al.  On the combination of hardware and software concurrency extraction methods , 1987, MICRO 20.

[13]  Arthur B. Maccabe,et al.  The program dependence web: a representation supporting control-, data-, and demand-driven interpretation of imperative languages , 1990, PLDI '90.

[14]  Yoichi Muraoka,et al.  On the Number of Operations Simultaneously Executable in Fortran-Like Programs and Their Resulting Speedup , 1972, IEEE Transactions on Computers.

[15]  Keshav Pingali,et al.  I-structures: data structures for parallel computing , 1986, Graph Reduction.

[16]  David E. Culler,et al.  Resource requirements of dataflow programs , 1988, [1988] The 15th Annual International Symposium on Computer Architecture. Conference Proceedings.

[17]  Constantine Demetrios Polychronopoulos.  On program restructuring, scheduling, and communication for parallel processor systems , 1986 .

[18]  Augustus Kinzel Uht.  Hardware extraction of low-level concurrency from sequential instruction streams (parallelism, implementation, architecture, dependencies, semantics) , 1985 .

[19]  Augustus K. Uht,et al.  Desirable code transformations for a concurrent machine , 1990 .