A CORDIC based array architecture for complex discrete wavelet transform

In this paper an array architecture for computation of Complex Discrete Wavelet Transform has been proposed. The wavelet filter coefficients are realized using multiplier less pipelined CORDIC algorithm. The choice of pipelined CORDIC algorithm over the conventional one for realizing the filter coefficient of CDWT is hardware effective and also effects in high frequency operation. The controller unit clusters input samples into even and odd samples coming in proper sequence at each clock cycles. This clustering provides a good amount of parallelism for faster operation of the filter compared to direct filter realization. The 8-tap filter bank is implemented using array architecture, effecting in high throughput. The algorithm developed is implemented on FPGA using the Virtex XCV100 series.