FPGA Optimal Implementation of PRINCE against Power Analysis Attacks

The algorithm PRINCE proposed in ASIACRYPT 2012 is a lightweight cipher, currently suitable for the implementation on RFID Smart Card of the IoT. It's studied to achieve the optimal implementation of PRINCE encryption algorithm, and to add a fixed random mask to enhance the anti power attacking ability of PRINCE. In this paper, we constructed the same operations into a module called PrinceRound, and used counter to control the PrinceRound module, while the same round operation runs repeatedly. As a result, it can save registers and effectively reduce the amount of computation. Further more, we used a special method by adding the random mask to S-box. The experimental results show that the optimized PRINCE occupies area 9.8% fewer than original PRINCE on FPGA and the encryption with a fixed random mask can run correctly. Last but not least, our research is the first one about the implementation of PRINCE algorithm on FPGA, and can serve as a reference for further application of IOT encryption.