Min-Max-DEVS modeling and simulation

Abstract The representation of timing, a key element in modeling hardware behavior, is realized in hardware description languages including ADLIB-SABLE, Verilog, and VHDL, through delay constructs. The use of delays in the literature may be organized into four classes. Under the first category, the mean values are utilized as precise delay elements in the simulators. VHDL adopts this view to characterize transport delays, where a single value is utilized, rise and fall delays, and inertial delays. In describing the lifetime of a state, also termed time advance function, DEVS proposes to use precise delay elements. Under the second category, termed min–max delay, a delay is represented through an interval, implying that the value of the delay is not known precisely and that any of the values in the interval represents a possible value for the actual delay. In the third category, a delay is expressed in the form of a stochastic distribution. The use of fuzzy models of delays constitutes the fourth category. In the real world, however, precise values for delays are very difficult, if not impossible, to obtain with certainty. The reasons include variations in the manufacturing process, temperature, voltage, and other environmental parameters. Consequently, simulations that employ precise delay values are susceptible to inaccurate results. This paper proposes an extension to the classical DEVS by introducing min–max delays for use in both internal and external transition functions. In the augmented formalism, termed Min–Max-DEVS, the state of a hardware model may, in some time interval, become unknown and is represented by the symbol, ϕ . The occurrence of ϕ implies greater accuracy of the results, not lack of information. Min–Max-DEVS offers a unique advantage, namely, the execution of a single simulation pass utilizing min–max delays is equivalent to multiple simulation passes, each corresponding to a set of precise delay values selected from the interval. This, in turn, poses a key challenge – efficient execution of the Min–Max-DEVS simulator.